[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220823210129.979394-1-kan.liang@linux.intel.com>
Date: Tue, 23 Aug 2022 14:01:26 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...hat.com,
linux-kernel@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 1/4] perf/x86: Add new Raptor Lake S support
From: Kan Liang <kan.liang@...ux.intel.com>
>From the PMU's perspective, the new Raptor Lake S is the same as the
other {ALDER,RAPTOP}LAKE.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
The series must be on top of commit ea902bcc1943 ("x86/cpu: Add new
Raptor Lake CPU model number")
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 2db93498ff71..3b21f068fcce 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6321,6 +6321,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_ALDERLAKE_N:
case INTEL_FAM6_RAPTORLAKE:
case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
/*
* Alder Lake has 2 types of CPU, core and atom.
*
--
2.35.1
Powered by blists - more mailing lists