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Message-ID: <09308102-f927-125e-4321-d231decbd6c9@linaro.org>
Date:   Wed, 24 Aug 2022 15:57:37 +0300
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Nava kishore Manne <nava.kishore.manne@....com>, git@....com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        michal.simek@...inx.com, mdf@...nel.org, hao.wu@...el.com,
        yilun.xu@...el.com, trix@...hat.com, p.zabel@...gutronix.de,
        gregkh@...uxfoundation.org, ronak.jain@...inx.com,
        rajan.vaja@...inx.com, abhyuday.godhasara@...inx.com,
        piyush.mehta@...inx.com, lakshmi.sai.krishna.potthuri@...inx.com,
        harsha.harsha@...inx.com, linus.walleij@...aro.org,
        nava.manne@...inx.com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-fpga@...r.kernel.org
Subject: Re: [PATCH 3/4] bindings: firmware: Update binding doc for the zynqmp
 afi config node

Use subject prefixes matching the subsystem (git log --oneline -- ...).

"bindings" is no correct.

On 24/08/2022 06:55, Nava kishore Manne wrote:
> Updates binding document for the zynqmp afi config node to handle the
> PS_PL Bus-width and resets.

Use imperative language:
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
> 
> Signed-off-by: Nava kishore Manne <nava.kishore.manne@....com>
> ---
>  .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml     | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> index f14f7b454f07..9504665cad95 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> @@ -59,6 +59,13 @@ properties:
>        controller.
>      type: object
>  
> +  zynqmp-fpga:

Just: fpga

> +    $ref: /schemas/fpga/xlnx,zynqmp-afi-fpga.yaml#
> +    description: The Zynq UltraScale+ MPSoC Processing System core provides
> +      access from PL masters to PS internal peripherals, and memory through
> +      AXI FIFO interface(AFI)
> +    type: object
> +
>  required:
>    - compatible
>  


Best regards,
Krzysztof

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