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Message-ID: <9e52af46-113f-e419-6cbd-729ae8caf36e@linaro.org>
Date: Wed, 24 Aug 2022 19:26:35 +0300
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Ivan Bornyakov <i.bornyakov@...rotek.ru>, mdf@...nel.org,
hao.wu@...el.com, yilun.xu@...el.com, trix@...hat.com,
dg@...ix.com, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org
Cc: linux-fpga@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, system@...rotek.ru
Subject: Re: [PATCH v7 2/2] dt-bindings: fpga: document Lattice sysCONFIG FPGA
manager
On 24/08/2022 18:01, Ivan Bornyakov wrote:
> Add Device Tree Binding doc for configuring Lattice ECP5 and MachXO2
> FPGAs over Slave SPI sysCONFIG interface.
>
> Signed-off-by: Ivan Bornyakov <i.bornyakov@...rotek.ru>
> ---
> .../bindings/fpga/lattice,sysconfig.yaml | 103 ++++++++++++++++++
> 1 file changed, 103 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
>
> diff --git a/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
> new file mode 100644
> index 000000000000..596776427a00
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
> @@ -0,0 +1,103 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/lattice,sysconfig.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lattice Slave SPI sysCONFIG FPGA manager
> +
> +maintainers:
> + - Ivan Bornyakov <i.bornyakov@...rotek.ru>
> +
> +description: |
> + Lattice sysCONFIG port, which is used for FPGA configuration, among others,
> + have Slave Serial Peripheral Interface. Only full reconfiguration is
> + supported.
> +
> + Programming of ECP5 is done by writing uncompressed bitstream image in .bit
> + format into FPGA's SRAM configuration memory.
> +
> + Programming of MachXO2 is done by writing configuration data into device's
> + internal non-volatile Flash memory, then Self-Download of data from Flash
> + into SRAM is issued.
> +
> +properties:
> + compatible:
> + enum:
> + - lattice,ecp5-fpga-mgr
> + - lattice,machxo2-fpga-mgr
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: lattice,machxo2-fpga-mgr
> + then:
> + properties:
> + spi-max-frequency:
> + maximum: 66000000
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: lattice,ecp5-fpga-mgr
> + then:
> + properties:
> + spi-max-frequency:
> + maximum: 60000000
> + program-gpios:
> + description:
> + A GPIO line connected to PROGRAMN (active low) pin of the device.
> + Initiates configuration sequence.
> + maxItems: 1
> + init-gpios:
> + description:
> + A GPIO line connected to INITN (active low) pin of the device.
> + Indicates that the FPGA is ready to be configured.
> + maxItems: 1
> + done-gpios:
> + description:
> + A GPIO line connected to DONE (active high) pin of the device.
> + Indicates that the configuration sequence is complete.
> + maxItems: 1
Define instead the properties in top-level properties and disallow them
for other variant (program-gpios: false). Required can stay.
> + required:
> + - program-gpios
> + - init-gpios
> + - done-gpios
> +
Best regards,
Krzysztof
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