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Message-ID: <20220825210252.GA1671168-robh@kernel.org>
Date: Thu, 25 Aug 2022 16:02:52 -0500
From: Rob Herring <robh@...nel.org>
To: Samuel Holland <samuel@...lland.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH 3/4] dt-bindings: nvmem: Allow bit offsets greater than a
byte
On Sun, Aug 14, 2022 at 12:36:54PM -0500, Samuel Holland wrote:
> Some NVMEM devices contain cells which do not start at a multiple of the
> device's stride. However, the "reg" property of a cell must be aligned
> to its provider device's stride.
How is a DT author supposed to know this?
I would lean toward it's the OS's problem to deal with (your option 1 I
guess). I worry that one client could expect it one way and another
client the other. Or folks making DT changes to 'fix' things.
>
> These cells can be represented in the DT using the "bits" property if
> that property allows offsets up to the full stride. 63 is chosen
> assuming that NVMEM devices will not have strides larger than 8 bytes.
>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
>
> Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> index 3bb349c634cb..4f440ab6a13c 100644
> --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> @@ -53,7 +53,7 @@ patternProperties:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> items:
> - minimum: 0
> - maximum: 7
> + maximum: 63
> description:
> Offset in bit within the address range specified by reg.
> - minimum: 1
> --
> 2.35.1
>
>
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