lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YweFttaSE2GOoW83@smile.fi.intel.com>
Date:   Thu, 25 Aug 2022 17:22:46 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Tharunkumar.Pasumarthi@...rochip.com
Cc:     jsd@...ihalf.com, wsa@...nel.org, krzk@...nel.org,
        sven@...npeter.dev, linux-kernel@...r.kernel.org,
        semen.protsenko@...aro.org, robh@...nel.org, olof@...om.net,
        UNGLinuxDriver@...rochip.com, jarkko.nikula@...ux.intel.com,
        arnd@...db.de, linux-i2c@...r.kernel.org, rafal@...ecki.pl
Subject: Re: [PATCH RFC i2c-master] i2c: microchip: pci1xxxx: Add driver for
 I2C host controller in multifunction endpoint of pci1xxxx switch

On Thu, Aug 25, 2022 at 01:15:42PM +0000, Tharunkumar.Pasumarthi@...rochip.com wrote:
> On Wed, 2022-08-24 at 21:31 +0300, Andy Shevchenko wrote:
> > On Wed, Aug 24, 2022 at 6:04 PM <Tharunkumar.Pasumarthi@...rochip.com> wrote:
> > > On Tue, 2022-08-23 at 18:05 +0300, Andy Shevchenko wrote:
> > > > On Tue, Aug 23, 2022 at 08:26:03PM +0530, Tharun Kumar P wrote:

...

> > > > > +#define SMB_IDLE_SCALING_100KHZ              0x03E803C9
> > > > > +#define SMB_IDLE_SCALING_400KHZ              0x01F4009D
> > > > > +#define SMB_IDLE_SCALING_1000KHZ     0x01F4009D
> > > > 
> > > > Shouldn't these magics be decimals?
> > 
> > This Q seems unanswered.
> 
> These magic numbers need not be decimals. Configuring registers with these
> values in driver will set the time in device. However, these values do not
> convey any meaning when represented in decimals.

Hmm... Maybe you don't see this, but I see the following:

0x03E803C9 = 65536 (i.e. 2^16) * 1000 + 969
0x01F4009D = 32768 (i.e. 2^15) * 1000 + 157

Pretty much sounds like a bit 15 for standard mode and bit 16 for fast modes
shifted by 1000 to have a room for the time in presumably nanoseconds up to 1
us.

Please, dig up into the documentation, vendor chat, etc to get more information
on these values.

> > > > Ditto for the rest similar stuff.
> > > 
> > > There is no direct correlation between the hex value and time. Configuring
> > > registers with these values in driver will set the time in device.

...

> > > > > +#define I2C_DIR_WRITE                0
> > > > > +#define I2C_DIR_READ         1
> > 
> > https://elixir.bootlin.com/linux/v6.0-rc2/source/include/uapi/linux/i2c.h#L24
> 
> I2C_M_RD is used in driver. But the purpose of these MACROs is different.
> I2C_DIR_WRITE is used inside both pci1xxxx_i2c_write as well as in
> pci1xxxx_i2c_read (for sending slave address). Thus these MACROs are required

OK. Name collision still stays.

> > > > Namespace collision. Doesn't I²C core provide these?
> > > 
> > > I am unable to find any existing MACROs for WRITE and READ in I2C core.
> > > Kindly let me know the MACROs

-- 
With Best Regards,
Andy Shevchenko


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ