lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3ed3d73a-1671-708e-7c42-498cca6aaf1d@gmail.com>
Date:   Thu, 25 Aug 2022 16:57:51 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Bo-Chen Chen <rex-bc.chen@...iatek.com>, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org
Cc:     jason-jh.lin@...iatek.com, nancy.lin@...iatek.com,
        ck.hu@...iatek.com, chunkuang.hu@...nel.org,
        angelogioacchino.delregno@...labora.com, hsinyi@...gle.com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2] dt-bindings: arm: mediatek: mmsys: change compatible
 for MT8195



On 25/08/2022 11:14, Bo-Chen Chen wrote:
> From: "Jason-JH.Lin" <jason-jh.lin@...iatek.com>
> 
> For previous MediaTek SoCs, such as MT8173, there are 2 display HW
> pipelines binding to 1 mmsys with the same power domain, the same
> clock driver and the same mediatek-drm driver.
> 
> For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
> 2 different power domains, different clock drivers and different
> mediatek-drm drivers.
> 
> Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR,
> CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality)
> and they makes VDOSYS0 supports PQ function while they are not
> including in VDOSYS1.
> 
> Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related
> component). It makes VDOSYS1 supports the HDR function while it's not
> including in VDOSYS0.
> 
> To summarize0:
> Only VDOSYS0 can support PQ adjustment.
> Only VDOSYS1 can support HDR adjustment.
> 
> Therefore, we need to separate these two different mmsys hardwares to
> 2 different compatibles for MT8195.
> 
> Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding")
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@...iatek.com>
> ---
> Changes for v2:
> 1. Add hardware difference for VDOSYS0 and VDOSYS1 in commit message.
> ---
>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml       | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 6ad023eec193..bfbdd30d2092 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -31,7 +31,8 @@ properties:
>                 - mediatek,mt8183-mmsys
>                 - mediatek,mt8186-mmsys
>                 - mediatek,mt8192-mmsys
> -              - mediatek,mt8195-mmsys
> +              - mediatek,mt8195-vdosys0

Thanks for you patch. As I mentioned on v1, I propose to set 
mediatek,mt8195-mmsys as fallback for mediatek,mt8195-vdosys0 to not break 
backwards compatibility.

Apart from that, the binding change will need some changes to support the new 
binding. Please provide these together with this patch.

Regards,
Matthias

> +              - mediatek,mt8195-vdosys >                 - mediatek,mt8365-mmsys
>             - const: syscon
>         - items:

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ