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Message-Id: <20220829162159.881588-3-benjamin.gaignard@collabora.com>
Date: Mon, 29 Aug 2022 18:21:54 +0200
From: Benjamin Gaignard <benjamin.gaignard@...labora.com>
To: mchehab@...nel.org, hverkuil@...all.nl,
ezequiel@...guardiasur.com.ar, p.zabel@...gutronix.de,
gregkh@...uxfoundation.org, mripard@...nel.org,
paul.kocialkowski@...tlin.com, wens@...e.org,
jernej.skrabec@...il.com, samuel@...lland.org,
nicolas.dufresne@...labora.com, andrzej.p@...labora.com
Cc: linux-media@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-staging@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
kernel@...labora.com,
Benjamin Gaignard <benjamin.gaignard@...labora.com>
Subject: [PATCH v3 2/7] media: hantro: HEVC: Fix auxilary buffer size calculation
SAO and FILTER buffers size depend of the bit depth.
Make sure we have enough space for 10bit bitstreams.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>
---
drivers/media/platform/verisilicon/hantro_hevc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro_hevc.c b/drivers/media/platform/verisilicon/hantro_hevc.c
index b990bc98164c..9383fb7081f6 100644
--- a/drivers/media/platform/verisilicon/hantro_hevc.c
+++ b/drivers/media/platform/verisilicon/hantro_hevc.c
@@ -104,7 +104,7 @@ static int tile_buffer_reallocate(struct hantro_ctx *ctx)
hevc_dec->tile_bsd.cpu = NULL;
}
- size = VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1);
+ size = (VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8;
hevc_dec->tile_filter.cpu = dma_alloc_coherent(vpu->dev, size,
&hevc_dec->tile_filter.dma,
GFP_KERNEL);
@@ -112,7 +112,7 @@ static int tile_buffer_reallocate(struct hantro_ctx *ctx)
goto err_free_tile_buffers;
hevc_dec->tile_filter.size = size;
- size = VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1);
+ size = (VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8;
hevc_dec->tile_sao.cpu = dma_alloc_coherent(vpu->dev, size,
&hevc_dec->tile_sao.dma,
GFP_KERNEL);
--
2.32.0
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