lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Ywz3aQ57PthSYycN@nvidia.com>
Date:   Mon, 29 Aug 2022 14:29:13 -0300
From:   Jason Gunthorpe <jgg@...dia.com>
To:     Baolu Lu <baolu.lu@...ux.intel.com>
Cc:     Joerg Roedel <joro@...tes.org>,
        Christoph Hellwig <hch@...radead.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Kevin Tian <kevin.tian@...el.com>,
        Ashok Raj <ashok.raj@...el.com>, Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Jean-Philippe Brucker <jean-philippe@...aro.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Vinod Koul <vkoul@...nel.org>,
        Eric Auger <eric.auger@...hat.com>,
        Liu Yi L <yi.l.liu@...el.com>,
        Jacob jun Pan <jacob.jun.pan@...el.com>,
        Zhangfei Gao <zhangfei.gao@...aro.org>,
        Zhu Tony <tony.zhu@...el.com>, iommu@...ts.linux.dev,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jean-Philippe Brucker <jean-philippe@...aro.org>
Subject: Re: [PATCH v12 12/17] arm-smmu-v3/sva: Add SVA domain support

On Sun, Aug 28, 2022 at 09:57:21PM +0800, Baolu Lu wrote:
> On 2022/8/26 22:56, Jason Gunthorpe wrote:
> > On Fri, Aug 26, 2022 at 08:11:36PM +0800, Lu Baolu wrote:
> > 
> > > +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
> > > +	.set_dev_pasid		= arm_smmu_sva_set_dev_pasid,
> > Do we want to permit drivers to not allow a SVA domain to be set on a
> > RID?
> > 
> > It seems like a weird restriction to me
> 
> Conceptually as long as the page table is compatible and user pages are
> pinned (or I/O page fault is supported), the device drivers are valid to
> set SVA domain to a RID. But I don't see a real use case as far as I can
> see.

It may be interesting for something like DPDK type applications where
having the entire process address space mapped SVA to the device could
be quite nice.

You, currently, give up interrupts, but perhaps that is solvable in some
way.

So, IDK.. I wouldn't dismiss it entirely but I wouldn't do a bunch of
work to support it either.

> A reasonable use case is sharing EPT between KVM and IOMMU. That demands
> a new type of domain and implements its own .set_dev for page table
> attachment.

Not everything is virtualization :)

Jason

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ