linux-kernel - Re: [PATCH 3/3] tty: serial: use uart_port_tx

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20220829085037.ec6qdrklgy4cbmym@pali>
Date:   Mon, 29 Aug 2022 10:50:37 +0200
From:   Pali Rohár <pali@...nel.org>
To:     Jiri Slaby <jirislaby@...nel.org>
Cc:     gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
        linux-kernel@...r.kernel.org, Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH 3/3] tty: serial: use uart_port_tx_limit() helper

On Monday 29 August 2022 09:27:01 Jiri Slaby wrote:
> On 11. 04. 22, 13:51, Pali Rohár wrote:
> > On Monday 11 April 2022 12:54:05 Jiri Slaby wrote:
> > > uart_port_tx_limit() is a new helper to send characters to the device.
> > > Use it in these drivers.
> > > 
> > > It means we have to define two new uart hooks: tx_ready() and put_char()
> > > to do the real job now.
> > > 
> > > And mux.c also needs to define tx_done(). But I'm not sure if the driver
> > > really wants to wait for all the characters to dismiss from the HW fifo
> > > at this code point. Hence I marked this as FIXME.
> > > 
> > > Signed-off-by: Jiri Slaby <jslaby@...e.cz>
> > > Cc: Russell King <linux@...linux.org.uk>
> > > Cc: Florian Fainelli <f.fainelli@...il.com>
> > > Cc: bcm-kernel-feedback-list@...adcom.com
> > > Cc: "Pali Rohár" <pali@...nel.org>
> > > Cc: Kevin Cernekee <cernekee@...il.com>
> > > Cc: Palmer Dabbelt <palmer@...belt.com>
> > > Cc: Paul Walmsley <paul.walmsley@...ive.com>
> > > Cc: Orson Zhai <orsonzhai@...il.com>
> > > Cc: Baolin Wang <baolin.wang7@...il.com>
> > > Cc: Chunyan Zhang <zhang.lyra@...il.com>
> > > Cc: Patrice Chotard <patrice.chotard@...s.st.com>
> > > Cc: linux-riscv@...ts.infradead.org
> > > ---
> > >   drivers/tty/serial/21285.c           | 40 +++++++--------------
> > >   drivers/tty/serial/altera_jtaguart.c | 43 ++++++----------------
> > >   drivers/tty/serial/amba-pl010.c      | 40 ++++-----------------
> > >   drivers/tty/serial/apbuart.c         | 37 ++++---------------
> > >   drivers/tty/serial/bcm63xx_uart.c    | 48 ++++++-------------------
> > >   drivers/tty/serial/mux.c             | 48 ++++++++-----------------
> > >   drivers/tty/serial/mvebu-uart.c      | 47 +++++++-----------------
> > >   drivers/tty/serial/omap-serial.c     | 53 +++++++---------------------
> > >   drivers/tty/serial/pxa.c             | 43 +++++-----------------
> > >   drivers/tty/serial/rp2.c             | 36 ++++++-------------
> > >   drivers/tty/serial/serial_txx9.c     | 40 ++++-----------------
> > >   drivers/tty/serial/sifive.c          | 48 ++++---------------------
> > >   drivers/tty/serial/sprd_serial.c     | 41 ++++-----------------
> > >   drivers/tty/serial/st-asc.c          | 51 ++++----------------------
> > >   drivers/tty/serial/vr41xx_siu.c      | 42 ++++------------------
> > >   15 files changed, 143 insertions(+), 514 deletions(-)
> > ...
> > > diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> > > index 0429c2a54290..3d07ab9eb15e 100644
> > > --- a/drivers/tty/serial/mvebu-uart.c
> > > +++ b/drivers/tty/serial/mvebu-uart.c
> > > @@ -194,6 +194,16 @@ static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
> > >   	return (st & STAT_TX_EMP) ? TIOCSER_TEMT : 0;
> > >   }
> > > +static bool mvebu_uart_tx_ready(struct uart_port *port)
> > > +{
> > > +	return !(readl(port->membase + UART_STAT) & STAT_TX_FIFO_FUL);
> > 
> > mvebu-uart.c driver in its tx_ready function should probably use
> > STAT_TX_RDY macro (access to STAT_TX_RDY bit in register).
> > 
> > Documentation for UART1 (STD) about this bit says:
> > 
> > This bit is set when TRANS_HLD (our UART_TSH macro) is empty and ready
> > for the CPU to write the next character to be transmitted out. The TSR
> > can still shift out the previous character when this bit is set. This
> > bit is cleared when the CPU writes to TRANS_HLD.
> > 
> > For UART2 (EXT) there is just information: UART Tx Ready for 1 Byte
> > Write. UART2 (EXT) has also bit (bit 5) which indicates that CPU can
> > load 4 bytes, but seems that this is not used by mvebu-uart.c driver.
> > 
> > Macro STAT_TX_RDY() is polled also in wait_for_xmitr() function.
> 
> Hi,
> so care to send fixes for the two issues :)? The series is not meant to
> change behavior...

Ok, I will look at it after your patches are merged to prevent merge conflicts.