| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <MW3PR12MB455321E78C1D50181541422C95799@MW3PR12MB4553.namprd12.prod.outlook.com>
Date: Tue, 30 Aug 2022 22:28:59 +0000
From: "Moger, Babu" <Babu.Moger@....com>
To: Reinette Chatre <reinette.chatre@...el.com>
CC: "bagasdotme@...il.com" <bagasdotme@...il.com>,
"bp@...en8.de" <bp@...en8.de>, "corbet@....net" <corbet@....net>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"eranian@...gle.com" <eranian@...gle.com>,
"fenghua.yu@...el.com" <fenghua.yu@...el.com>,
"hpa@...or.com" <hpa@...or.com>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"mingo@...hat.com" <mingo@...hat.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"tony.luck@...el.com" <tony.luck@...el.com>,
"x86@...nel.org" <x86@...nel.org>
Subject: RE: [PATCH v3 02/10] x86/cpufeatures: Add Slow Memory Bandwidth
Allocation feature flag
[AMD Official Use Only - General]
Hi Reinette,
> -----Original Message-----
> From: Reinette Chatre <reinette.chatre@...el.com>
> Sent: Tuesday, August 30, 2022 11:40 AM
> To: Moger, Babu <Babu.Moger@....com>
> Cc: bagasdotme@...il.com; bp@...en8.de; corbet@....net;
> dave.hansen@...ux.intel.com; eranian@...gle.com; fenghua.yu@...el.com;
> hpa@...or.com; linux-doc@...r.kernel.org; linux-kernel@...r.kernel.org;
> mingo@...hat.com; tglx@...utronix.de; tony.luck@...el.com; x86@...nel.org
> Subject: Re: [PATCH v3 02/10] x86/cpufeatures: Add Slow Memory Bandwidth
> Allocation feature flag
>
> Hi Babu,
>
> On 8/29/2022 4:25 PM, Babu Moger wrote:
> > Hi Reinette,
> > Some reason this thread did not land in my mailbox. Replying using
> > git sendmail to the thread
> >
> >> (snip modified links)
> >
> > Link:
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
> > amd.com%2Fen%2Fsupport%2Ftech-docs%2Famd64-technology-platform-
> quality
> > -service-
> extensions&data=05%7C01%7Cbabu.moger%40amd.com%7C5e1d3f7a
> >
> a30749a3841e08da8aa69bd0%7C3dd8961fe4884e608e11a82d994e183d%7C0
> %7C0%7C
> >
> 637974796714276452%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD
> AiLCJQIjo
> >
> iV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdat
> a=yGIo
> > q%2Fp9xD1i6IfrkPEUj8sg9Xz08r0jrNTvGK7khko%3D&reserved=0
> > Link:
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> >
> illa.kernel.org%2Fshow_bug.cgi%3Fid%3D206537&data=05%7C01%7Cbab
> u.m
> >
> oger%40amd.com%7C5e1d3f7aa30749a3841e08da8aa69bd0%7C3dd8961fe48
> 84e608e
> >
> 11a82d994e183d%7C0%7C0%7C637974796714276452%7CUnknown%7CTWFpb
> GZsb3d8ey
> >
> JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C300
> >
> 0%7C%7C%7C&sdata=qu1cxHp6nCdEFJbJv5QDD0tAHHaV4tJ63NKC9fIiIx0%
> 3D&am
> > p;reserved=0
> >
> >> When you say "in this case", is there another case?
> >
> > There is no other interface. It is only CXL memory device.
> >
> >>
> >> Should "Slow Memory Bandwidth Allocation" thus be considered to be
> >> "CXL.mem Memory Bandwidth Allocation"? Why not call it "CXL(.mem?)
> >> Memory Bandwith Allocation"?
> >
> > Checked with our team here. The currently only supported slow memory
> > is CXL.mem device. As for the naming, the "slow" memory landscape is still
> evolving.
> > While CXL.mem is the only known type supported right now. The specs
> > says "Slow Memory Bandwidth Allocation". So, we would prefer to keep it
> that way.
>
> If you prefer to keep "Slow Memory Bandwidth Allocation" then please also
> provide clear information to the user on what is managed via "Memory
> Bandwidth Allocation" and what is managed via "Slow Memory Bandwidth
> Allocation". This could be in the documentation.
Sure.
>
> >> I am not familiar with CXL so please correct me where I am wrong.
> >> From what I understand CXL.mem is a protocol and devices that
> >> implement it can have different memory types ... some faster than
> >> others. So, even if SMBA supports "CXL.mem" devices, could a system
> >> have multiple CXL.mem devices, some faster than others? Would all be
> >> configured the same with SMBA (they would all be classified as "slow" and
> throttled the same)?
> >
> > I have not tested the multiple devices with different memory speeds here.
> > But checking with team here says it should just work the same way. It
> > appears that the throttling logic groups all the slow sources together
> > and applies the limit on them as a whole.
>
> "the throttling logic groups all the slow sources together and applies the limit
> on them as a whole.". This is valuable content for the documentation about this
> feature. Could the changes to Documentation/x86/resctrl.rst be updated to
> include a paragraph describing SMBA and what is (or is not) considered a "slow
> resource"?
Sure.
>
> >> I do not think these devices are invisible to the OS though (after
> >> reading Documentation/driver-api/cxl/memory-devices.rst and
> >> Documentation/ABI/testing/sysfs-class-cxl).
> >>
> >> Is there not a way to provide some more clarity to users on what
> >> would be throttled?
> >>
>
> I repeat the question you snipped from my email (please don't do that). Could
Sorry.. Not intentional.
> you please answer it?:
> Would the "SMBA" resource be available only when CXL.mem devices are
> present on the system? Since this is a CPU feature it is unclear to me whether
> presence of CXL.mem devices would be known at the time "SMBA" is
> enumerated.
> Could the "SMBA" resource thus exist without memory to throttle?
Yes. The presence of the SMBA feature(with CXL.mem) is independent of whether slow memory is actually present in the system. If there is no slow memory, then setting a SMBA limit will have no impact on the performance of the system.
>
> >> How does a user know which memory on the system is "slow memory"?
> >>
> >> It remains unclear to me how a user is intended to use this feature.
> >>
> >> How will a user know which devices/memory (if any) are being
> >> throttled by "SMBA"?
> >>
> > This is a new technology. I am still learning.
> >
> > Currently, I have tested with CXL 1.1 type of device. CXL 1.1 uses a
> > simple topology structure of direct attachment between host (such as a
> > CPU or GPU) and CXL device.
> >
> > #numactl -H
> > available: 2 nodes (0-1)
> > node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 node 0 size:
> > 63678 MB node 0 free: 59542 MB
> > node 1 cpus: (CPU list is emply. Node 1 have CXL memory)
> > node 1 size: 16122 MB (There is 16GB CXL memory)
> > node 1 free: 15627 MB
> > node distances:
> > node 0 1
> > 0: 10 50
> > 1: 50 10
> >
> > The cpu-cxl node distance is greater than cpu-to-cpu distances.
> >
> > We can also verify using lsmem
> >
> > #lsmem --output RANGE,SIZE,STATE,NODE,ZONES,BLOCK
> > RANGE SIZE STATE NODE ZONES BLOCK
> > 0x0000000000000000-0x000000007fffffff 2G online 0 None 0
> > 0x0000000080000000-0x00000000ffffffff 2G online 0 DMA32 1
> > 0x0000000100000000-0x0000000fffffffff 60G online 0 Normal 2-31
> > 0x0000001000000000-0x000000107fffffff 2G online 0 None 32
> > 0x0000001080000000-0x000000147fffffff 16G online 1 Normal 33-40
> >
> > Memory block size: 2G
> > Total online memory: 82G
> > Total offline memory: 0B
> >
> >
> > We can also verify using ACPI SRAT table and memory maps.
>
> I think that adding (in general terms) that "SMBA throttles CXL.mem devices" to
> Documentation/x86/resctrl.rst may be sufficient for a user to understand what
> will be throttled without needing to go into details about CXL device discovery.
Sure.
Thanks
Babu
Powered by blists - more mailing lists