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Message-ID: <dbbef6f3-cf47-a921-fd89-e940af3e2f85@linaro.org>
Date: Tue, 30 Aug 2022 09:23:04 +0300
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>,
helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org, dmitry.baryshkov@...aro.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stanimir Varbanov <svarbanov@...sol.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 2/3] dt-bindings: pci: QCOM Adding sc7280 aggre0,
aggre1 clocks
On 29/08/2022 20:45, Krishna Chaitanya Chundru wrote:
> Sorry for very late reply.
>
> If we increase the common definitions of clocks properties to "13" it is
> sufficient right.
>
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 92402f1..c9e268d 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -53,11 +53,11 @@ properties:
> # Platform constraints are described later.
> clocks:
> minItems: 3
> - maxItems: 12
> + maxItems: 13
>
> clock-names:
> minItems: 3
> - maxItems: 12
> + maxItems: 13
>
Yes.
Best regards,
Krzysztof
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