lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <ed1d4fb5-c9e9-39de-d21a-4156991e9e37@microchip.com>
Date:   Tue, 30 Aug 2022 06:44:57 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <Claudiu.Beznea@...rochip.com>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <palmer@...belt.com>,
        <p.zabel@...gutronix.de>, <Daire.McNamara@...rochip.com>
CC:     <paul.walmsley@...ive.com>, <aou@...s.berkeley.edu>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v3 03/13] clk: microchip: mpfs: add reset controller

On 30/08/2022 07:40, Claudiu Beznea - M18063 wrote:
> On 19.08.2022 12:53, Conor Dooley wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Add a reset controller to PolarFire SoC's clock driver. This reset
>> controller is registered as an aux device and read/write functions
>> exported to the drivers namespace so that the reset controller can
>> access the peripheral device reset register.
>>
>> Reviewed-by: Daire McNamara <daire.mcnamara@...rochip.com>
>> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>> ---

>> +static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data)
>> +{
>> +       struct auxiliary_device *adev;
>> +       int ret;
>> +
>> +       adev = mpfs_reset_adev_alloc(clk_data);
>> +       if (IS_ERR(adev))
>> +               return PTR_ERR(adev);
>> +
>> +       ret = auxiliary_device_add(adev);
>> +       if (ret) {
>> +               auxiliary_device_uninit(adev);
>> +               return ret;
>> +       }
>> +
>> +       ret = devm_add_action_or_reset(clk_data->dev, mpfs_reset_unregister_adev, adev);
>> +       if (ret)
>> +               return ret;
>> +
>> +       return 0;
> 
> You can just:
> 	return ret;
> or:
> 	return devm_add_action_or_reset();
> 
>> +}
>> +
>> +#else /* !CONFIG_RESET_CONTROLLER */
>> +
>> +static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data)
>> +{
>> +       return 0;
>> +}
>> +
>> +#endif /* !CONFIG_RESET_CONTROLLER */
>> +
>>   static int mpfs_clk_probe(struct platform_device *pdev)
>>   {
>>          struct device *dev = &pdev->dev;
>> @@ -465,6 +553,8 @@ static int mpfs_clk_probe(struct platform_device *pdev)
>>                  return PTR_ERR(clk_data->msspll_base);
>>
>>          clk_data->hw_data.num = num_clks;
>> +       clk_data->dev = dev;
>> +       dev_set_drvdata(dev, clk_data);
>>
>>          ret = mpfs_clk_register_mssplls(dev, mpfs_msspll_clks, ARRAY_SIZE(mpfs_msspll_clks),
>>                                          clk_data);
>> @@ -484,6 +574,10 @@ static int mpfs_clk_probe(struct platform_device *pdev)
>>          if (ret)
>>                  return ret;
>>
>> +       ret = mpfs_reset_controller_register(clk_data);
>> +       if (ret)
>> +               return ret;
>> +
>>          return ret;
> 
> Ditto
> 
>>   }
>>

willdo^2

Thanks,
Conor.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ