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Message-ID: <35507213-ea34-70f9-461b-33dc4697cc89@amlogic.com>
Date: Tue, 30 Aug 2022 15:06:39 +0800
From: Yu Tu <yu.tu@...ogic.com>
To: Jerome Brunet <jbrunet@...libre.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Neil Armstrong <narmstrong@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH V3 2/6] arm64: dts: meson: add S4 Soc PLL clock controller
in DT
On 2022/8/30 14:36, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
>
>
> On Tue 30 Aug 2022 at 14:05, Yu Tu <yu.tu@...ogic.com> wrote:
>
>> On 2022/8/29 17:43, Jerome Brunet wrote:
>>> [ EXTERNAL EMAIL ]
>>> On Mon 15 Aug 2022 at 14:17, Yu Tu <yu.tu@...ogic.com> wrote:
>>>
>>>> Hi Jerome,
>>>>
>>>> On 2022/8/10 21:32, Jerome Brunet wrote:
>>>>> [ EXTERNAL EMAIL ]
>>>>> On Fri 05 Aug 2022 at 17:39, Yu Tu <yu.tu@...ogic.com> wrote:
>>>>>
>>>>>> Hi Krzysztof,
>>>>>> Thank you for your reply.
>>>>>>
>>>>>> On 2022/8/5 17:16, Krzysztof Kozlowski wrote:
>>>>>>> [ EXTERNAL EMAIL ]
>>>>>>> On 05/08/2022 10:57, Yu Tu wrote:
>>>>>>>> Added information about the S4 SOC PLL Clock controller in DT.
>>>>>>>>
>>>>>>>> Signed-off-by: Yu Tu <yu.tu@...ogic.com>
>>>>>>>> ---
>>>>>>>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 8 ++++++++
>>>>>>>> 1 file changed, 8 insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> index ff213618a598..a816b1f7694b 100644
>>>>>>>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>>>>>>>> @@ -92,6 +92,14 @@ apb4: apb4@...00000 {
>>>>>>>> #size-cells = <2>;
>>>>>>>> ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>>>>>>> + clkc_pll: pll-clock-controller@...0 {
>>>>>>> Node names should be generic - clock-controller.
>>>>>>> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>>>>>>>
>>>>>> I will change to clkc_pll: clock-controller@...0, in next version.
>>>>> Same comment applies to the binding doc.
>>>> OKay.
>>>>> Also it would be nice to split this in two series.
>>>>> Bindings and drivers in one, arm64 dt in the other. These changes goes
>>>>> in through different trees.
>>>> At present, Bindings, DTS and drivers are three series. Do you mean to put
>>>> Bindings and drivers together? If so, checkpatch.pl will report a warning.
>>> Yes because patches are not in yet so there is a good reason to ignore
>>> the warning. Warning will never show up on the actual tree if the
>>> patches are correctly ordered.
>>
>> I think Binding, DTS and drivers use three series and you said two series
>> is not a big problem. Three series are recommended for checkpatch.pl, I
>> think it should be easy for that to separate and merge。
>
> No - There is only 2 series. 1 for the bindings and clock drivers and
> one for the DT once things are in
All right, we'll do it your way.
>
>>
>> I've sent it to V4. Please look at V4 and give some comments.
>>
>
> That's not how it works. You sent that before v3 review was done. There
> are still comments that needed to be addressed
Yes. But can you reply faster?
>
> Given the time it takes to make that review I going to completly skip v4
> and I'd like on the comment to addressed before you send another version
>
What can I say? It's up to you.
>
>>>
>>>>
>>>>>
>>>>>>> Best regards,
>>>>>>> Krzysztof
>>>>>>> .
>>>>> .
>>> .
>
> .
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