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Message-ID: <6729c3d8-c59e-4655-d30a-aed315e8fe8f@linaro.org>
Date:   Tue, 30 Aug 2022 12:49:10 +0300
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Conor Dooley <conor.dooley@...rochip.com>,
        Daire McNamara <daire.mcnamara@...rochip.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Cyril Jean <cyril.jean@...rochip.com>,
        Lewis Hanly <lewis.hanly@...rochip.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: riscv: update microchip.yaml's
 maintainership

On 29/08/2022 16:41, Conor Dooley wrote:
> Daire and I are the platform maintainers for Microchip's RISC-V
> FPGAs. Update the maintainers in microchip.yaml to reflect this and
> explicitly add the binding to the SoC's MAINTAINERS entry.
> 
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> Two patches seemed overkill for this, but scream and I will split them.
> I figured I would take this for 6.1 myself on top of my other changes
> to microchip.yaml.


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>


Best regards,
Krzysztof

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