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Message-ID: <0c2ac76e-45ff-b5a1-f33a-177eea04c17d@amd.com>
Date: Wed, 31 Aug 2022 18:28:46 +0000
From: "Larson, Bradley" <Bradley.Larson@....com>
To: Serge Semin <fancer.lancer@...il.com>,
Brad Larson <brad@...sando.io>
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Subject: Re: [PATCH v6 04/17] dt-bindings: spi: dw: Add AMD Pensando Elba SoC
SPI Controller bindings
On 8/21/22 10:49 AM, Serge Semin wrote:
> On Sat, Aug 20, 2022 at 12:57:37PM -0700, Brad Larson wrote:
>> From: Brad Larson <blarson@....com>
>>
>> The AMD Pensando Elba SoC has integrated the DW APB SPI Controller
>>
>> Signed-off-by: Brad Larson <blarson@....com>
>> ---
>> .../devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>> index 37c3c272407d..403d6416f7ac 100644
>> --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>> @@ -37,6 +37,15 @@ allOf:
>> else:
>> required:
>> - interrupts
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - amd,pensando-elba-spi
>> + then:
>> + required:
>> + - amd,pensando-elba-syscon
> Please add the "amd,pensando-elba-syscon" property definition as I
> asked here:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2F20220704131810.kabkuy6e4qmhfm3n%40mobilestation%2F&data=05%7C01%7Cbradley.larson%40amd.com%7C1c4f822c81424048873508da839d90fc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637967010019245894%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=xl9OU9P9QK3wLHc25hQZK393ylULd41qc4HB2Zt%2F0BQ%3D&reserved=0
Proposing this addition:
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -148,6 +148,15 @@ properties:
of the designware controller, and the upper limit is also subject to
controller configuration.
+ amd,pensando-elba-syscon:
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ maxItems: 1
+ description:
+ A phandle to syscon used to access the spi chip-select override
register.
+ items:
+ - items:
+ - description: phandle to the syscon node
+
patternProperties:
"^.*@[0-9a-f]+$":
type: object
Regards,
Brad
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