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Message-ID: <CAJ+vNU1F3sYuSX9HEpVEPb-NzFEaKnuc_5mznTHOLFmCkCu_Lg@mail.gmail.com>
Date: Wed, 31 Aug 2022 13:18:46 -0700
From: Tim Harvey <tharvey@...eworks.com>
To: kostap@...vell.com
Cc: Miquel Raynal <miquel.raynal@...tlin.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
gregory.clement@...tlin.com, sebastian.hesselbarth@...il.com,
vladimir.vid@...tura.hr, luka.kovacic@...tura.hr,
linux-phy@...ts.infradead.org,
Device Tree Mailing List <devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>,
Linux ARM Mailing List <linux-arm-kernel@...ts.infradead.org>,
mw@...ihalf.com, jaz@...ihalf.com, nadavh@...vell.com,
stefanc@...vell.com, bpeled@...vell.com
Subject: cn9130-crb PCI support
Konstantin,
In commit 5c0ee54723f3 ("arm64: dts: add support for Marvell
cn9130-crb platform") which added support for the cn9130-crb where are
the PCI RESET# and CLKREQ# pins configured and specified?
As PCIE_PERST# is connected to CP_MPP[52] on the board I expected to
either see something like:
cp0_pci_pins: cp0-pci-pins-0 {
marvell,pins = "mpp52";
marvell,function = "pci";
};
or:
&cp0_pcie0 {
gpios-reset = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
};
I don't see any support in the PCIe driver (marvell,armada8k-pcie,
snps,dw-pcie) that support gpios-reset.
I'm working on support for another cn9130 board and am unclear how to
configure the pinctrl for PERST# as well as CLKREQ3. Any pointers
would be greatly appreciated.
Best Regards,
Tim
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