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Message-ID: <9c1248a4-d4e5-c7f5-ac8d-685ef3f01365@collabora.com>
Date:   Wed, 31 Aug 2022 10:47:27 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     sboyd@...nel.org, Michael Turquette <mturquette@...libre.com>
Cc:     mturquette@...libre.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
        p.zabel@...gutronix.de, y.oudjana@...tonmail.com,
        jason-jh.lin@...iatek.com, ck.hu@...iatek.com,
        fparent@...libre.com, rex-bc.chen@...iatek.com,
        tinghan.shen@...iatek.com, ikjn@...omium.org,
        miles.chen@...iatek.com, sam.shih@...iatek.com, wenst@...omium.org,
        bgolaszewski@...libre.com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
        konrad.dybcio@...ainline.org, marijn.suijten@...ainline.org,
        martin.botka@...ainline.org, ~postmarketos/upstreaming@...ts.sr.ht,
        phone-devel@...r.kernel.org, paul.bouchara@...ainline.org,
        kernel@...labora.com
Subject: Re: [PATCH v6 0/8] MediaTek Helio X10 MT6795 - Clock drivers

Il 22/07/22 11:06, AngeloGioacchino Del Regno ha scritto:
> In an effort to give some love to the apparently forgotten MT6795 SoC,
> I am upstreaming more components that are necessary to support platforms
> powered by this one apart from a simple boot to serial console.
> 
> This (very big) series introduces system clock, multimedia clock drivers
> (including resets) for this SoC.
> 
> Tested on a MT6795 Sony Xperia M5 (codename "Holly") smartphone.
> 
> This series depends on, and can be merged on top of:
> [1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=640122
> [2]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=637849

Hello Stephen, Michael,

this series has been well reviewed and has been floating around for months.

Can you please take a look and/or pick it?
Many thanks!

P.S.: Dependencies [1], [2] are already upstream.

Regards,
Angelo

> 
> Changes in v6:
>   - Added helper function to cleanly unregister ref2usb_tx clocks
>   - Added missing error handling and remove function to clk-mt6795-mm
> 
> Changes in v5:
>   - Renamed clock/reset header filenames to add vendor prefix
>   - Removed quotes for $id, $schema in commit [4/7]
> 
> Changes in v4:
>   - Removed unnecessary examples for clock controllers in commit [4/7]
>   - Fixed one instance of 88 columns line wrap in commit [4/7]
> 
> Changes in v3:
>   - Fixed typo in commit [4/7]
> 
> Changes in v2:
>   - Fixed yaml clock bindings as per Rob's review
>   - Added ability to compile all MT6795 clock drivers as modules
>   - Added commits to export some symbols, required to compile as module
> 
> 
> AngeloGioacchino Del Regno (8):
>    dt-bindings: mediatek: Document MT6795 system controllers bindings
>    dt-bindings: clock: Add MediaTek Helio X10 MT6795 clock bindings
>    dt-bindings: reset: Add bindings for MT6795 Helio X10 reset
>      controllers
>    dt-bindings: clock: mediatek: Add clock driver bindings for MT6795
>    clk: mediatek: clk-apmixed: Remove unneeded __init annotation
>    clk: mediatek: Export required symbols to compile clk drivers as
>      module
>    clk: mediatek: clk-apmixed: Add helper function to unregister
>      ref2usb_tx
>    clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers
> 
>   .../arm/mediatek/mediatek,infracfg.yaml       |   2 +
>   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   1 +
>   .../arm/mediatek/mediatek,pericfg.yaml        |   1 +
>   .../bindings/clock/mediatek,apmixedsys.yaml   |   1 +
>   .../bindings/clock/mediatek,mt6795-clock.yaml |  66 ++
>   .../clock/mediatek,mt6795-sys-clock.yaml      |  54 ++
>   .../bindings/clock/mediatek,topckgen.yaml     |   1 +
>   drivers/clk/mediatek/Kconfig                  |  37 ++
>   drivers/clk/mediatek/Makefile                 |   6 +
>   drivers/clk/mediatek/clk-apmixed.c            |  12 +-
>   drivers/clk/mediatek/clk-cpumux.c             |   2 +
>   drivers/clk/mediatek/clk-mt6795-apmixedsys.c  | 157 +++++
>   drivers/clk/mediatek/clk-mt6795-infracfg.c    | 151 +++++
>   drivers/clk/mediatek/clk-mt6795-mfg.c         |  50 ++
>   drivers/clk/mediatek/clk-mt6795-mm.c          | 132 ++++
>   drivers/clk/mediatek/clk-mt6795-pericfg.c     | 160 +++++
>   drivers/clk/mediatek/clk-mt6795-topckgen.c    | 610 ++++++++++++++++++
>   drivers/clk/mediatek/clk-mt6795-vdecsys.c     |  55 ++
>   drivers/clk/mediatek/clk-mt6795-vencsys.c     |  50 ++
>   drivers/clk/mediatek/clk-mtk.c                |   2 +
>   drivers/clk/mediatek/clk-mtk.h                |   1 +
>   drivers/clk/mediatek/reset.c                  |   1 +
>   .../dt-bindings/clock/mediatek,mt6795-clk.h   | 275 ++++++++
>   .../reset/mediatek,mt6795-resets.h            |  53 ++
>   24 files changed, 1879 insertions(+), 1 deletion(-)
>   create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml
>   create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-apmixedsys.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-infracfg.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-mfg.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-mm.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-pericfg.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-topckgen.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-vdecsys.c
>   create mode 100644 drivers/clk/mediatek/clk-mt6795-vencsys.c
>   create mode 100644 include/dt-bindings/clock/mediatek,mt6795-clk.h
>   create mode 100644 include/dt-bindings/reset/mediatek,mt6795-resets.h
> 


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