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Message-ID: <20220831124850.7748-3-johnson.wang@mediatek.com>
Date: Wed, 31 Aug 2022 20:48:48 +0800
From: Johnson Wang <johnson.wang@...iatek.com>
To: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<angelogioacchino.delregno@...labora.com>, <sboyd@...nel.org>
CC: <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Johnson Wang <johnson.wang@...iatek.com>,
Edward-JW Yang <edward-jw.yang@...iatek.com>
Subject: [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping
Add the new binding documentation for MediaTek frequency hopping
and spread spectrum clocking control.
Co-developed-by: Edward-JW Yang <edward-jw.yang@...iatek.com>
Signed-off-by: Edward-JW Yang <edward-jw.yang@...iatek.com>
Signed-off-by: Johnson Wang <johnson.wang@...iatek.com>
---
.../bindings/arm/mediatek/mediatek,fhctl.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
new file mode 100644
index 000000000000..c5d76410538b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,fhctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek frequency hopping and spread spectrum clocking control
+
+maintainers:
+ - Edward-JW Yang <edward-jw.yang@...iatek.com>
+
+description: |
+ Frequency hopping control (FHCTL) is a piece of hardware that control
+ some PLLs to adopt "hopping" mechanism to adjust their frequency.
+ Spread spectrum clocking (SSC) is another function provided by this hardware.
+
+properties:
+ compatible:
+ const: mediatek,fhctl
+
+ reg:
+ maxItems: 1
+
+ mediatek,hopping-ssc-percents:
+ description: |
+ Determine the enablement of frequency hopping feature and the percentage
+ of spread spectrum clocking for PLLs.
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description: PLL id that is expected to enable frequency hopping.
+ - description: The percentage of spread spectrum clocking for one PLL.
+ minimum: 0
+ maximum: 8
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8186-clk.h>
+ fhctl: fhctl@...0ce00 {
+ compatible = "mediatek,fhctl";
+ reg = <0x1000c000 0xe00>;
+ mediatek,hopping-ssc-percents = <CLK_APMIXED_MSDCPLL 3>;
+ };
--
2.18.0
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