| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Fri, 2 Sep 2022 01:42:51 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Michael Zhu <michael.zhu@...rfivetech.com>,
Drew Fustini <drew@...gleboard.org>,
Emil Renner Berthing <kernel@...il.dk>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...labora.com
Subject: [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
Document the compatibles for StarFive VisionFive V1 SBC [1].
The board is based on the StarFive JH7100 SoC.
[1] https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
---
Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index 5b36243fd674..9c948b379c8f 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -21,6 +21,9 @@ properties:
- items:
- const: beagle,beaglev-starlight-jh7100-r0
- const: starfive,jh7100
+ - items:
+ - const: starfive,visionfive-v1
+ - const: starfive,jh7100
additionalProperties: true
--
2.37.2
Powered by blists - more mailing lists