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Message-Id: <20220901072414.1923075-5-iskren.chernev@gmail.com>
Date:   Thu,  1 Sep 2022 10:24:03 +0300
From:   Iskren Chernev <iskren.chernev@...il.com>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        Iskren Chernev <iskren.chernev@...il.com>,
        Andy Gross <agross@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-kernel@...r.kernel.org
Subject: [PATCH 04/14] arm64: dts: qcom: sm6115: Add pinctrl node

Add support for the TLMM on the SM6115.

Signed-off-by: Iskren Chernev <iskren.chernev@...il.com>
---
 arch/arm64/boot/dts/qcom/sm6115.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 5af915e80017..efbc81d2253b 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -388,6 +388,19 @@ soc: soc {
 		#size-cells = <1>;
 		ranges = <0 0 0 0xffffffff>;
 
+		tlmm: pinctrl@...000 {
+			compatible = "qcom,sm6115-tlmm";
+			reg = <0x500000 0x400000>,
+				<0x900000 0x400000>,
+				<0xd00000 0x400000>;
+			reg-names = "west", "south", "east";
+			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			gpio-ranges = <&tlmm 0 0 121>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+		};
+
 		gcc: clock-controller@...0000 {
 			compatible = "qcom,gcc-sm6115", "syscon";
 			reg = <0x1400000 0x1f0000>;
-- 
2.37.2

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