lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220901072414.1923075-11-iskren.chernev@gmail.com>
Date:   Thu,  1 Sep 2022 10:24:09 +0300
From:   Iskren Chernev <iskren.chernev@...il.com>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        Iskren Chernev <iskren.chernev@...il.com>,
        Andy Gross <agross@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-kernel@...r.kernel.org
Subject: [PATCH 10/14] arm64: dts: qcom: sm6115: Add SPMI bus node

Add support for the SPMI bus on the SM6115.

Signed-off-by: Iskren Chernev <iskren.chernev@...il.com>
---
 arch/arm64/boot/dts/qcom/sm6115.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 491fffff8aa1..d578f8425e36 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -543,6 +543,25 @@ qusb2_hstx_trim: hstx_trim@25b {
 			};
 		};
 
+		spmi_bus: qcom,spmi@...0000 {
+			compatible = "qcom,spmi-pmic-arb";
+			reg = <0x1c40000 0x1100>,
+			      <0x1e00000 0x2000000>,
+			      <0x3e00000 0x100000>,
+			      <0x3f00000 0xa0000>,
+			      <0x1c0a000 0x26000>;
+			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+			interrupt-names = "periph_irq";
+			interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,ee = <0>;
+			qcom,channel = <0>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			interrupt-controller;
+			#interrupt-cells = <4>;
+			cell-index = <0>;
+		};
+
 		tcsr_mutex_regs: syscon@...0000 {
 			compatible = "syscon";
 			reg = <0x340000 0x20000>;
-- 
2.37.2

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ