linux-kernel - Re: [PATCH v2] clk: ingenic-tcu: Properly enable registers before accessing timers

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Date:   Wed, 31 Aug 2022 18:28:35 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>,
        mturquette@...libre.com
Cc:     paul@...pouillou.net, paulburton@...nel.org,
        linux-mips@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] clk: ingenic-tcu: Properly enable registers before accessing timers

Quoting Aidan MacDonald (2022-06-17 05:22:54)
> Access to registers is guarded by ingenic_tcu_{enable,disable}_regs()
> so the stop bit can be cleared before accessing a timer channel, but
> those functions did not clear the stop bit on SoCs with a global TCU
> clock gate.
> 
> Testing on the X1000 has revealed that the stop bits must be cleared
> _and_ the global TCU clock must be ungated to access timer registers.
> This appears to be the norm on Ingenic SoCs, and is specified in the
> documentation for the X1000 and numerous JZ47xx SoCs.
> 
> If the stop bit isn't cleared, register writes don't take effect and
> the system can be left in a broken state, eg. the watchdog timer may
> not run.
> 
> The bug probably went unnoticed because stop bits are zeroed when
> the SoC is reset, and the kernel does not set them unless a timer
> gets disabled at runtime. However, it is possible that a bootloader
> or a previous kernel (if using kexec) leaves the stop bits set and
> we should not rely on them being cleared.
> 
> Fixing this is easy: have ingenic_tcu_{enable,disable}_regs() always
> clear the stop bit, regardless of the presence of a global TCU gate.
> 
> Reviewed-by: Paul Cercueil <paul@...pouillou.net>
> Tested-by: Paul Cercueil <paul@...pouillou.net>
> Fixes: 4f89e4b8f121 ("clk: ingenic: Add driver for the TCU clocks")
> Cc: stable@...r.kernel.org
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---

Applied to clk-fixes