linux-kernel - Re: [PATCH v2 8/9] perf/x86/intel: Shadow MSR_ARCH_PERFMON_FIXED_CTR

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Message-ID: <883ef80c-4adb-c77b-7cc6-dab50bef490e@linux.intel.com>
Date:   Thu, 1 Sep 2022 07:37:55 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     x86@...nel.org, eranian@...gle.com, ravi.bangoria@....com,
        linux-kernel@...r.kernel.org, acme@...nel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...nel.org, namhyung@...nel.org
Subject: Re: [PATCH v2 8/9] perf/x86/intel: Shadow
 MSR_ARCH_PERFMON_FIXED_CTR_CTRL



On 2022-09-01 6:04 a.m., Peter Zijlstra wrote:
> On Thu, Sep 01, 2022 at 11:10:49AM +0200, Peter Zijlstra wrote:
>> On Wed, Aug 31, 2022 at 09:52:19AM -0400, Liang, Kan wrote:
>>>
>>>
>>> On 2022-08-29 6:10 a.m., Peter Zijlstra wrote:
>>>> Less RDMSR is more better.
>>>
>>> I had an RFC patch which does a further step to move the fixed
>>> control register write to right before the entire PMU re-enabling, which
>>> could also save some writes if there are several fixed counters enabled.
>>> https://lore.kernel.org/lkml/20220804140729.2951259-1-kan.liang@linux.intel.com/
>>>
>>> Do you have any comments for the RFC patch?
>>>
>>
>> Oh, I like that better, let me just replace my patch with that.
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/wip.cleanup
> 
> Should have your patch instead of mine for the FIXED_CTR_CTRL and have
> the pmu methods in the right place.

Thanks. I will do more test today with the updated branch.

Thanks,
Kan