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Message-ID: <fb446c28-a28e-4e26-e388-7124d24291ef@linux.intel.com>
Date:   Thu, 1 Sep 2022 08:42:05 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Namhyung Kim <namhyung@...nel.org>
Cc:     peterz@...radead.org, acme@...nel.org, mingo@...hat.com,
        eranian@...gle.com, mpe@...erman.id.au,
        linux-kernel@...r.kernel.org, ak@...ux.intel.com,
        andreas.kogler.0x@...il.com, atrajeev@...ux.vnet.ibm.com,
        ravi.bangoria@....com
Subject: Re: [PATCH 3/6] perf: Use sample_flags for branch stack



On 2022-08-31 6:47 p.m., Namhyung Kim wrote:
> On Wed, Aug 31, 2022 at 07:55:11AM -0700, kan.liang@...ux.intel.com wrote:
>> From: Kan Liang <kan.liang@...ux.intel.com>
>>
>> Use the new sample_flags to indicate whether the branch stack is filled
>> by the PMU driver.
>>
>> Remove the br_stack from the perf_sample_data_init() to minimize the number
>> of cache lines touched.
>>
>> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
>> ---
>>  arch/powerpc/perf/core-book3s.c | 1 +
>>  arch/x86/events/core.c          | 4 +++-
>>  arch/x86/events/intel/core.c    | 4 +++-
>>  arch/x86/events/intel/ds.c      | 5 ++++-
>>  include/linux/perf_event.h      | 4 ++--
>>  kernel/events/core.c            | 4 ++--
>>  6 files changed, 15 insertions(+), 7 deletions(-)
> 
> Looks like you need to update AMD LBR code in amd_pmu_v2_handle_irq().

Right, the patch is on the top of the 6.0-rc, which doesn't include the
AMD LBR code yet. I will re-base on Peter's perf/core.

Thanks,
Kan

> 
> Thanks,
> Namhyung
> 
>>
>> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
>> index 13919eb96931..1ad1efdb33f9 100644
>> --- a/arch/powerpc/perf/core-book3s.c
>> +++ b/arch/powerpc/perf/core-book3s.c
>> @@ -2297,6 +2297,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
>>  			cpuhw = this_cpu_ptr(&cpu_hw_events);
>>  			power_pmu_bhrb_read(event, cpuhw);
>>  			data.br_stack = &cpuhw->bhrb_stack;
>> +			data.sample_flags |= PERF_SAMPLE_BRANCH_STACK;
>>  		}
>>  
>>  		if (event->attr.sample_type & PERF_SAMPLE_DATA_SRC &&
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index f969410d0c90..bb34a28fa71b 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -1714,8 +1714,10 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
>>  
>>  		perf_sample_data_init(&data, 0, event->hw.last_period);
>>  
>> -		if (has_branch_stack(event))
>> +		if (has_branch_stack(event)) {
>>  			data.br_stack = &cpuc->lbr_stack;
>> +			data.sample_flags |= PERF_SAMPLE_BRANCH_STACK;
>> +		}
>>  
>>  		if (perf_event_overflow(event, &data, regs))
>>  			x86_pmu_stop(event, 0);
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 4fce2bdbbf87..36f95894dd1c 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -3004,8 +3004,10 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
>>  
>>  		perf_sample_data_init(&data, 0, event->hw.last_period);
>>  
>> -		if (has_branch_stack(event))
>> +		if (has_branch_stack(event)) {
>>  			data.br_stack = &cpuc->lbr_stack;
>> +			data.sample_flags |= PERF_SAMPLE_BRANCH_STACK;
>> +		}
>>  
>>  		if (perf_event_overflow(event, &data, regs))
>>  			x86_pmu_stop(event, 0);
>> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
>> index 3af24c4891fb..d5f3007af59d 100644
>> --- a/arch/x86/events/intel/ds.c
>> +++ b/arch/x86/events/intel/ds.c
>> @@ -1645,8 +1645,10 @@ static void setup_pebs_fixed_sample_data(struct perf_event *event,
>>  		data->sample_flags |= PERF_SAMPLE_TIME;
>>  	}
>>  
>> -	if (has_branch_stack(event))
>> +	if (has_branch_stack(event)) {
>>  		data->br_stack = &cpuc->lbr_stack;
>> +		data->sample_flags |= PERF_SAMPLE_BRANCH_STACK;
>> +	}
>>  }
>>  
>>  static void adaptive_pebs_save_regs(struct pt_regs *regs,
>> @@ -1796,6 +1798,7 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,
>>  		if (has_branch_stack(event)) {
>>  			intel_pmu_store_pebs_lbrs(lbr);
>>  			data->br_stack = &cpuc->lbr_stack;
>> +			data->sample_flags |= PERF_SAMPLE_BRANCH_STACK;
>>  		}
>>  	}
>>  
>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>> index b0ebbb1377b9..2aec1765b3d5 100644
>> --- a/include/linux/perf_event.h
>> +++ b/include/linux/perf_event.h
>> @@ -1010,7 +1010,6 @@ struct perf_sample_data {
>>  	u64				sample_flags;
>>  	u64				addr;
>>  	struct perf_raw_record		*raw;
>> -	struct perf_branch_stack	*br_stack;
>>  	u64				period;
>>  	union perf_sample_weight	weight;
>>  	u64				txn;
>> @@ -1020,6 +1019,8 @@ struct perf_sample_data {
>>  	 * The other fields, optionally {set,used} by
>>  	 * perf_{prepare,output}_sample().
>>  	 */
>> +	struct perf_branch_stack	*br_stack;
>> +
>>  	u64				type;
>>  	u64				ip;
>>  	struct {
>> @@ -1060,7 +1061,6 @@ static inline void perf_sample_data_init(struct perf_sample_data *data,
>>  	data->sample_flags = 0;
>>  	data->addr = addr;
>>  	data->raw  = NULL;
>> -	data->br_stack = NULL;
>>  	data->period = period;
>>  	data->weight.full = 0;
>>  	data->data_src.val = PERF_MEM_NA;
>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index c9b9cb79231a..104c0c9f4e6f 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
>> @@ -7052,7 +7052,7 @@ void perf_output_sample(struct perf_output_handle *handle,
>>  	}
>>  
>>  	if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
>> -		if (data->br_stack) {
>> +		if (data->sample_flags & PERF_SAMPLE_BRANCH_STACK) {
>>  			size_t size;
>>  
>>  			size = data->br_stack->nr
>> @@ -7358,7 +7358,7 @@ void perf_prepare_sample(struct perf_event_header *header,
>>  
>>  	if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
>>  		int size = sizeof(u64); /* nr */
>> -		if (data->br_stack) {
>> +		if (data->sample_flags & PERF_SAMPLE_BRANCH_STACK) {
>>  			if (perf_sample_save_hw_index(event))
>>  				size += sizeof(u64);
>>  
>> -- 
>> 2.35.1
>>
>>

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