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Message-Id: <20220901133950.115122-3-aouledameur@baylibre.com>
Date: Thu, 1 Sep 2022 15:39:48 +0200
From: Amjad Ouled-Ameur <aouledameur@...libre.com>
To: matthias.bgg@...il.com
Cc: Markus Schneider-Pargmann <msp@...libre.com>, rafael@...nel.org,
fparent@...libre.com, amitk@...nel.org, daniel.lezcano@...aro.org,
devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-pm@...r.kernel.org,
robh+dt@...nel.org, rui.zhang@...el.com,
Amjad Ouled-Ameur <aouledameur@...libre.com>
Subject: [PATCH v3 2/4] thermal: mediatek: control buffer enablement tweaks
From: Markus Schneider-Pargmann <msp@...libre.com>
Add logic in order to be able to turn on the control buffer on MT8365.
This change now allows to have control buffer support for MTK_THERMAL_V1,
and it allows to define the register offset, and mask used to enable it.
Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
Signed-off-by: Fabien Parent <fparent@...libre.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@...libre.com>
---
Changes in V3:
- Use GENMASK() and BIT() instead of hardcoded data.
- Use u32 instead of int for "tmp" var in mtk_thermal_turn_on_buffer()
drivers/thermal/mtk_thermal.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index ede94eadddda..b5b4401249e8 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -271,6 +271,9 @@ struct mtk_thermal_data {
bool need_switch_bank;
struct thermal_bank_cfg bank_data[MAX_NUM_ZONES];
enum mtk_thermal_version version;
+ u32 apmixed_buffer_ctl_reg;
+ u32 apmixed_buffer_ctl_mask;
+ u32 apmixed_buffer_ctl_set;
};
struct mtk_thermal {
@@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
.adcpnp = mt7622_adcpnp,
.sensor_mux_values = mt7622_mux_values,
.version = MTK_THERMAL_V2,
+ .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1,
+ .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3),
+ .apmixed_buffer_ctl_set = BIT(0),
};
/*
@@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = {
};
MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
-static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base)
+static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt,
+ void __iomem *apmixed_base)
{
- int tmp;
+ u32 tmp;
+
+ if (!mt->conf->apmixed_buffer_ctl_reg)
+ return;
- tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1);
- tmp &= ~(0x37);
- tmp |= 0x1;
- writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1);
+ tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
+ tmp &= mt->conf->apmixed_buffer_ctl_mask;
+ tmp |= mt->conf->apmixed_buffer_ctl_set;
+ writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
udelay(200);
}
@@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev)
goto err_disable_clk_auxadc;
}
+ mtk_thermal_turn_on_buffer(mt, apmixed_base);
+
if (mt->conf->version == MTK_THERMAL_V2) {
- mtk_thermal_turn_on_buffer(apmixed_base);
mtk_thermal_release_periodic_ts(mt, auxadc_base);
}
--
2.37.3
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