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Message-ID: <YxI2CyoBNnV+q22W@matsya>
Date: Fri, 2 Sep 2022 22:27:47 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Konrad Dybcio <konrad.dybcio@...ainline.org>,
Kishon Vijay Abraham I <kishon@...com>,
Stephen Boyd <swboyd@...omium.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, johan+linaro@...nel.org
Subject: Re: [PATCH] phy: qcom: edp: Postpone clk_set_rate until the PLL is up
On 05-08-22, 08:44, Bjorn Andersson wrote:
> When the platform was booted with the involved clocks enabled the
> clk_set_rate() of the link and pixel clocks will perculate to the
> children, which will fail to update because the PHY driver has just shut
> down the PLL.
>
> Postpone the clock rate updates until the PLL is back online to avoid
> reconfiguring the clocks while the PLL is not ticking.
Applied, thanks
This gave me a conflict which I think I have resolved, pls do check
Thanks
--
~Vinod
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