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Message-ID: <202209021223.dFNp4IzK-lkp@intel.com>
Date: Fri, 2 Sep 2022 12:58:59 +0800
From: kernel test robot <lkp@...el.com>
To: Jesse Taube <mr.bossman075@...il.com>, linux-imx@....com
Cc: kbuild-all@...ts.01.org, robh+dt@...nel.org,
mturquette@...libre.com, sboyd@...nel.org, shawnguo@...nel.org,
s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
aisheng.dong@....com, stefan@...er.ch, linus.walleij@...aro.org,
daniel.lezcano@...aro.org, tglx@...utronix.de, arnd@...db.de,
olof@...om.net, soc@...nel.org, linux@...linux.org.uk,
abel.vesa@....com, dev@...xeye.de, marcel.ziswiler@...adex.com,
tharvey@...eworks.com, leoyang.li@....com,
sebastian.reichel@...labora.com, cniedermaier@...electronics.com,
Mr.Bossman075@...il.com, clin@...e.com,
giulio.benetti@...ettiengineering.com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v6 06/10] clk: imx: Update pllv3 to support i.MXRT1170
Hi Jesse,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on soc/for-next linus/master v6.0-rc3 next-20220901]
[cannot apply to tip/timers/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jesse-Taube/Add-support-for-i-MXRT1170-evk/20220902-023651
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-defconfig
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/4949a69928402161dfceafc7c6efc708433f5fec
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jesse-Taube/Add-support-for-i-MXRT1170-evk/20220902-023651
git checkout 4949a69928402161dfceafc7c6efc708433f5fec
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/imx/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/bits.h:6,
from drivers/clk/imx/clk-imx6q.c:9:
drivers/clk/imx/clk-imx6q.c: In function 'imx6q_clocks_init':
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:477:33: note: in expansion of macro 'imx_clk_hw_pllv3'
477 | hws[IMX6QDL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:478:33: note: in expansion of macro 'imx_clk_hw_pllv3'
478 | hws[IMX6QDL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:479:33: note: in expansion of macro 'imx_clk_hw_pllv3'
479 | hws[IMX6QDL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:480:33: note: in expansion of macro 'imx_clk_hw_pllv3'
480 | hws[IMX6QDL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:481:33: note: in expansion of macro 'imx_clk_hw_pllv3'
481 | hws[IMX6QDL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:482:33: note: in expansion of macro 'imx_clk_hw_pllv3'
482 | hws[IMX6QDL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6q.c:483:33: note: in expansion of macro 'imx_clk_hw_pllv3'
483 | hws[IMX6QDL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^~~~~~~~~~~~~~~~
--
In file included from include/linux/bits.h:6,
from drivers/clk/imx/clk-imx6sl.c:6:
drivers/clk/imx/clk-imx6sl.c: In function 'imx6sl_clocks_init':
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:217:32: note: in expansion of macro 'imx_clk_hw_pllv3'
217 | hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:218:32: note: in expansion of macro 'imx_clk_hw_pllv3'
218 | hws[IMX6SL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:219:32: note: in expansion of macro 'imx_clk_hw_pllv3'
219 | hws[IMX6SL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:220:32: note: in expansion of macro 'imx_clk_hw_pllv3'
220 | hws[IMX6SL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:221:32: note: in expansion of macro 'imx_clk_hw_pllv3'
221 | hws[IMX6SL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:222:32: note: in expansion of macro 'imx_clk_hw_pllv3'
222 | hws[IMX6SL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sl.c:223:32: note: in expansion of macro 'imx_clk_hw_pllv3'
223 | hws[IMX6SL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^~~~~~~~~~~~~~~~
--
In file included from include/linux/bits.h:6,
from include/linux/bitops.h:6,
from include/linux/kernel.h:22,
from include/linux/clk.h:13,
from drivers/clk/imx/clk-imx6sll.c:8:
drivers/clk/imx/clk-imx6sll.c: In function 'imx6sll_clocks_init':
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:123:33: note: in expansion of macro 'imx_clk_hw_pllv3'
123 | hws[IMX6SLL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "pll1_bypass_src", base + 0x00, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:124:33: note: in expansion of macro 'imx_clk_hw_pllv3'
124 | hws[IMX6SLL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "pll2_bypass_src", base + 0x30, 0x1);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:125:33: note: in expansion of macro 'imx_clk_hw_pllv3'
125 | hws[IMX6SLL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "pll3_bypass_src", base + 0x10, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:126:33: note: in expansion of macro 'imx_clk_hw_pllv3'
126 | hws[IMX6SLL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "pll4_bypass_src", base + 0x70, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:127:33: note: in expansion of macro 'imx_clk_hw_pllv3'
127 | hws[IMX6SLL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "pll5_bypass_src", base + 0xa0, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:128:33: note: in expansion of macro 'imx_clk_hw_pllv3'
128 | hws[IMX6SLL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "pll6_bypass_src", base + 0xe0, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sll.c:129:33: note: in expansion of macro 'imx_clk_hw_pllv3'
129 | hws[IMX6SLL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "pll7_bypass_src", base + 0x20, 0x3);
| ^~~~~~~~~~~~~~~~
--
In file included from include/linux/bits.h:6,
from drivers/clk/imx/clk-imx6sx.c:7:
drivers/clk/imx/clk-imx6sx.c: In function 'imx6sx_clocks_init':
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:160:32: note: in expansion of macro 'imx_clk_hw_pllv3'
160 | hws[IMX6SX_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:161:32: note: in expansion of macro 'imx_clk_hw_pllv3'
161 | hws[IMX6SX_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:162:32: note: in expansion of macro 'imx_clk_hw_pllv3'
162 | hws[IMX6SX_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:163:32: note: in expansion of macro 'imx_clk_hw_pllv3'
163 | hws[IMX6SX_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:164:32: note: in expansion of macro 'imx_clk_hw_pllv3'
164 | hws[IMX6SX_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:165:32: note: in expansion of macro 'imx_clk_hw_pllv3'
165 | hws[IMX6SX_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^~~~~~~~~~~~~~~~
>> include/vdso/bits.h:7:33: warning: conversion from 'long unsigned int' to 'u8' {aka 'unsigned char'} changes value from '4096' to '0' [-Woverflow]
7 | #define BIT(nr) (UL(1) << (nr))
| ^~~~~~~~~~~~~~~
drivers/clk/imx/clk.h:9:33: note: in expansion of macro 'BIT'
9 | #define BM_PLL_POWER BIT(12)
| ^~~
drivers/clk/imx/clk.h:108:69: note: in expansion of macro 'BM_PLL_POWER'
108 | __imx_clk_hw_pllv3(type, name, parent_name, base, div_mask, BM_PLL_POWER)
| ^~~~~~~~~~~~
drivers/clk/imx/clk-imx6sx.c:166:32: note: in expansion of macro 'imx_clk_hw_pllv3'
166 | hws[IMX6SX_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^~~~~~~~~~~~~~~~
..
vim +7 include/vdso/bits.h
3945ff37d2f48d Vincenzo Frascino 2020-03-20 6
3945ff37d2f48d Vincenzo Frascino 2020-03-20 @7 #define BIT(nr) (UL(1) << (nr))
3945ff37d2f48d Vincenzo Frascino 2020-03-20 8
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