lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Fri, 2 Sep 2022 08:15:01 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Qingtao Cao <qingtao.cao.au@...il.com>
Cc:     nathan@...hanrossi.com, Qingtao Cao <qingtao.cao@...i.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [v2 PATCH 1/1] gpio: exar: access MPIO registers on slave chips

On Fri, Sep 2, 2022 at 2:50 AM Qingtao Cao <qingtao.cao.au@...il.com> wrote:
>
> When EXAR xr17v35x chips are cascaded in order to access the MPIO registers
> (part of the Device Configuration Registers) of the slave chips, an offset
> needs to be applied based on the number of master chip's UART channels.

Looks good to me, but here is one important thing. Is documentation
really refers to this setup as "master-slave"? If no, can we replace
to something like promary/secondary or other suitable variants?
(Replace in the comments and variable names, etc)

-- 
With Best Regards,
Andy Shevchenko

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ