[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1662171184-25211-3-git-send-email-quic_krichai@quicinc.com>
Date: Sat, 3 Sep 2022 07:43:03 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org, dmitry.baryshkov@...aro.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stanimir Varbanov <svarbanov@...sol.com>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Subject: [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
changes since v2:
- Increase the max items of clock's in common properties.
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 0b69b12..b759465 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -53,11 +53,11 @@ properties:
# Platform constraints are described later.
clocks:
minItems: 3
- maxItems: 12
+ maxItems: 13
clock-names:
minItems: 3
- maxItems: 12
+ maxItems: 13
resets:
minItems: 1
@@ -423,8 +423,8 @@ allOf:
then:
properties:
clocks:
- minItems: 11
- maxItems: 11
+ minItems: 13
+ maxItems: 13
clock-names:
items:
- const: pipe # PIPE clock
@@ -437,6 +437,8 @@ allOf:
- const: bus_slave # Slave AXI clock
- const: slave_q2a # Slave Q2A clock
- const: tbu # PCIe TBU clock
+ - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
+ - const: aggre1 # Aggre NoC PCIe1 AXI clock
- const: ddrss_sf_tbu # PCIe SF TBU clock
resets:
maxItems: 1
--
2.7.4
Powered by blists - more mailing lists