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Message-ID: <20220904172900.099ed1d0@jic23-huawei>
Date: Sun, 4 Sep 2022 17:29:00 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Vincent Whitchurch <vincent.whitchurch@...s.com>
Cc: kernel <kernel@...s.com>, "lars@...afoo.de" <lars@...afoo.de>,
Axel Jonsson <Axel.Jonsson@...s.com>,
"linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] iio: adc: mcp320x: add triggered buffer support
On Wed, 31 Aug 2022 09:47:50 +0200
Vincent Whitchurch <vincent.whitchurch@...s.com> wrote:
> On Sun, Aug 28, 2022 at 07:24:30PM +0200, Jonathan Cameron wrote:
> > On Wed, 24 Aug 2022 12:40:02 +0200
> > Vincent Whitchurch <vincent.whitchurch@...s.com> wrote:
> > > Add support for triggered buffers. Just read the channels in a loop to
> > > keep things simple.
> >
> > Just curious, but what other options are there? A quick datasheet scroll
> > through didn't seem to suggest you can overlap setup of next read with
> > reading out the previous (common on SPI ADCs).
>
> You're right that the hardware doesn't support any special method to
> read out multiple channels; I can mention that in the commit message.
> But I think you could construct a spi_message which a bunch of
> spi_transfers which toggle the CS appropriately between them to read out
> multiple channels in one go? (Note that the variants have different
> data formats, and many of the variants only have one channel.)
That might be a little more efficient on a suitably advanced
SPI controller, or where the overhead of jumping between drivers
is large, but in many cases it won't save that much.
Would need an experiment on a platform someone cares about to decide
if it is worthwhile.
Jonathan
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