lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YxYXfhCCaj6tGAx7@black.fi.intel.com>
Date:   Mon, 5 Sep 2022 18:36:30 +0300
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Kai-Heng Feng <kai.heng.feng@...onical.com>
Cc:     andreas.noever@...il.com, michael.jamet@...el.com,
        YehezkelShB@...il.com, sanju.mehta@....com,
        mario.limonciello@....com, linux-usb@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] thunderbolt: Resume PCIe bridges after switch is found
 on AMD USB4 controller

On Mon, Sep 05, 2022 at 11:24:26PM +0800, Kai-Heng Feng wrote:
> > can you check if that is happening? It should show up in the dmesg when
> > CONFIG_PCI_DEBUG=y but I don't see it in yours.
> 
> That's because there isn't any child device yet, so the function bails early:
> if (!dev->subordinate || list_empty(&dev->subordinate->devices))

Ah, of course I forgot that this is hotplug case so there are no need
for the delays :/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ