[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20220905010921.GQ1728671@dragon>
Date: Mon, 5 Sep 2022 09:09:21 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Li Yang <leoyang.li@....com>
Cc: devicetree@...r.kernel.org, robh+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Laurentiu Tudor <laurentiu.tudor@....com>,
Robin Murphy <robin.murphy@....com>
Subject: Re: [PATCH 09/11] arm64: dts: ls1043a: use a pseudo-bus to constrain
usb and sata dma size
On Wed, Aug 24, 2022 at 05:37:00PM -0500, Li Yang wrote:
> From: Laurentiu Tudor <laurentiu.tudor@....com>
>
> Wrap the usb and sata controllers in an intermediate simple-bus and use
> it to constrain the dma address size of these usb controllers to the 40
> bits that they generate toward the interconnect. This is required
> because the SoC uses 48 bits address sizes and this mismatch would lead
> to smmu context faults because the usb generates 40-bit addresses while
> the smmu page tables are populated with 48-bit wide addresses.
>
> Suggested-by: Robin Murphy <robin.murphy@....com>
> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@....com>
> Signed-off-by: Li Yang <leoyang.li@....com>
> ---
> .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 92 ++++++++++---------
> 1 file changed, 50 insertions(+), 42 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index 20888aceb5f4..1942ab84ab1c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -815,51 +815,59 @@ QORIQ_CLK_PLL_DIV(1)>,
> QORIQ_CLK_PLL_DIV(1)>;
> };
>
> - usb0: usb@...0000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0x2f00000 0x0 0x10000>;
> - interrupts = <0 60 0x4>;
> - dr_mode = "host";
> - snps,quirk-frame-length-adjustment = <0x20>;
> - snps,dis_rxdet_inp3_quirk;
> - usb3-lpm-capable;
> - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> - status = "disabled";
> - };
> + aux_bus: aux_bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
> +
> + usb0: usb@...0000 {
> + compatible = "snps,dwc3";
> + reg = <0x0 0x2f00000 0x0 0x10000>;
> + interrupts = <0 60 0x4>;
While at it, use define for polarity cell?
Shawn
> + dr_mode = "host";
> + snps,quirk-frame-length-adjustment = <0x20>;
> + snps,dis_rxdet_inp3_quirk;
> + usb3-lpm-capable;
> + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> + status = "disabled";
> + };
>
> - usb1: usb@...0000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0x3000000 0x0 0x10000>;
> - interrupts = <0 61 0x4>;
> - dr_mode = "host";
> - snps,quirk-frame-length-adjustment = <0x20>;
> - snps,dis_rxdet_inp3_quirk;
> - usb3-lpm-capable;
> - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> - status = "disabled";
> - };
> + usb1: usb@...0000 {
> + compatible = "snps,dwc3";
> + reg = <0x0 0x3000000 0x0 0x10000>;
> + interrupts = <0 61 0x4>;
> + dr_mode = "host";
> + snps,quirk-frame-length-adjustment = <0x20>;
> + snps,dis_rxdet_inp3_quirk;
> + usb3-lpm-capable;
> + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> + status = "disabled";
> + };
>
> - usb2: usb@...0000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0x3100000 0x0 0x10000>;
> - interrupts = <0 63 0x4>;
> - dr_mode = "host";
> - snps,quirk-frame-length-adjustment = <0x20>;
> - snps,dis_rxdet_inp3_quirk;
> - usb3-lpm-capable;
> - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> - status = "disabled";
> - };
> + usb2: usb@...0000 {
> + compatible = "snps,dwc3";
> + reg = <0x0 0x3100000 0x0 0x10000>;
> + interrupts = <0 63 0x4>;
> + dr_mode = "host";
> + snps,quirk-frame-length-adjustment = <0x20>;
> + snps,dis_rxdet_inp3_quirk;
> + usb3-lpm-capable;
> + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
> + status = "disabled";
> + };
>
> - sata: sata@...0000 {
> - compatible = "fsl,ls1043a-ahci";
> - reg = <0x0 0x3200000 0x0 0x10000>,
> - <0x0 0x20140520 0x0 0x4>;
> - reg-names = "ahci", "sata-ecc";
> - interrupts = <0 69 0x4>;
> - clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
> - QORIQ_CLK_PLL_DIV(1)>;
> - dma-coherent;
> + sata: sata@...0000 {
> + compatible = "fsl,ls1043a-ahci";
> + reg = <0x0 0x3200000 0x0 0x10000>,
> + <0x0 0x20140520 0x0 0x4>;
> + reg-names = "ahci", "sata-ecc";
> + interrupts = <0 69 0x4>;
> + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
> + QORIQ_CLK_PLL_DIV(1)>;
> + dma-coherent;
> + };
> };
>
> msi1: msi-controller1@...1000 {
> --
> 2.37.1
>
Powered by blists - more mailing lists