linux-kernel - Re: [PATCH v6 4/4] arm64: dts: meson: Add DDR PMU node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <35c2cf9f-ef18-f735-9869-0b70dc1e860b@baylibre.com>
Date:   Mon, 5 Sep 2022 09:16:30 +0200
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Jiucheng Xu <jiucheng.xu@...ogic.com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Kevin Hilman <khilman@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Chris Healy <cphealy@...il.com>
Subject: Re: [PATCH v6 4/4] arm64: dts: meson: Add DDR PMU node

On 01/09/2022 04:45, Jiucheng Xu wrote:
> Add DDR PMU device node for G12 series SoC
> 
> Signed-off-by: Jiucheng Xu <jiucheng.xu@...ogic.com>
> ---
> Changes v6 -> v5:
>    - No change
> 
> Changes v5 -> v4:
>    - Split reg into two items
>    - Alphabet order location
> 
> Changes v3 -> v4:
>    - No change
> 
> Changes v2 -> v3:
>    - No change
> 
> Changes v1 -> v2:
>    - Remove model, dmc_nr, chann_nr properties
>    - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as
>      identifier
> ---
>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++
>   arch/arm64/boot/dts/amlogic/meson-g12a.dtsi       | 4 ++++
>   arch/arm64/boot/dts/amlogic/meson-g12b.dtsi       | 4 ++++
>   arch/arm64/boot/dts/amlogic/meson-sm1.dtsi        | 4 ++++
>   4 files changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index 45947c1031c4..9dbd50820b1c 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -1705,6 +1705,12 @@ internal_ephy: ethernet_phy@8 {
>   			};
>   		};
>   
> +		pmu: pmu@...38000 {
> +			reg = <0x0 0xff638000 0x0 0x100>,
> +			      <0x0 0xff638c00 0x0 0x100>;
> +			interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>   		aobus: bus@...00000 {
>   			compatible = "simple-bus";
>   			reg = <0x0 0xff800000 0x0 0x100000>;
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index fb0ab27d1f64..0e8b57283f31 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -133,3 +133,7 @@ map1 {
>   		};
>   	};
>   };
> +
> +&pmu {
> +	compatible = "amlogic,g12a-ddr-pmu";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> index ee8fcae9f9f0..18791ef51f58 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> @@ -139,3 +139,7 @@ map1 {
>   &mali {
>   	dma-coherent;
>   };
> +
> +&pmu {
> +	compatible = "amlogic,g12b-ddr-pmu";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 80737731af3f..c307b34ccd72 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -520,6 +520,10 @@ &pcie {
>   	power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
>   };
>   
> +&pmu {
> +	compatible = "amlogic,sm1-ddr-pmu";
> +};
> +
>   &pwrc {
>   	compatible = "amlogic,meson-sm1-pwrc";
>   };

Reviewed-by: Neil Armstrong <narmstrong@...libre.com>