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Message-ID: <3af38280-c94b-e5ef-7a66-4869b1f36a30@quicinc.com>
Date:   Mon, 5 Sep 2022 12:51:12 +0530
From:   Sai Prakash Ranjan <quic_saipraka@...cinc.com>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        "Krishna Chaitanya Chundru" <quic_krichai@...cinc.com>
CC:     Stephen Boyd <swboyd@...omium.org>, <helgaas@...nel.org>,
        <linux-pci@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <mka@...omium.org>,
        <quic_vbadigan@...cinc.com>, <quic_hemantk@...cinc.com>,
        <quic_nitegupt@...cinc.com>, <quic_skananth@...cinc.com>,
        <quic_ramkri@...cinc.com>, <dmitry.baryshkov@...aro.org>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Stanimir Varbanov <svarbanov@...sol.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH v5 2/3] PCI: qcom: Restrict pci transactions after pci
 suspend

On 8/30/2022 5:25 PM, Manivannan Sadhasivam wrote:

<SNIP>...

>> diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
>> index 21b3ac2a29d2..042afec1cf9d 100644
>> --- a/kernel/irq/irqdesc.c
>> +++ b/kernel/irq/irqdesc.c
>> @@ -487,8 +487,9 @@ static int alloc_descs(unsigned int start, unsigned int
>> cnt, int node,
>>
>>
>>
>>                 if (affinity) {
>>                          if (affinity->is_managed) {
>> -                               flags = IRQD_AFFINITY_MANAGED |
>> -                                       IRQD_MANAGED_SHUTDOWN;
>> +//                             flags = IRQD_AFFINITY_MANAGED |
>> +//                                     IRQD_MANAGED_SHUTDOWN;
>> +                               flags = 0;//IRQD_AFFINITY_MANAGED |
>>                          }
>>                          mask = &affinity->mask;
>>                          node = cpu_to_node(cpumask_first(mask));
>>
> The only solution I can think of is keeping the clocks related to DBI access
> active or switch to another clock source that consumes less power if available
> during suspend.
>
> But limiting the DBI access using hacks doesn't look good.

Why not just define "irq_startup and irq_shutdown" callbacks for dw_pcie_msi_irq_chip?
So when the cpu is offlined and irq_shutdown is called for that irqchip in migrate_one_irq(),
you would mask the irq and then disable the clocks. Similarly, on CPU onlining, you would
enable the clocks and unmask the irq. This way XO is still achieved as you are turning off
the clocks before suspend and back on after resume.

Thanks,
Sai


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