linux-kernel - Re: [PATCH v6 1/1] gpio: mpfs: add polarfire soc gpio support

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Message-ID: <23d74882a69b39025005495886faec3e5b129ba7.camel@microchip.com>
Date:   Mon, 5 Sep 2022 10:45:38 +0000
From:   <Lewis.Hanly@...rochip.com>
To:     <linus.walleij@...aro.org>
CC:     <linux-riscv@...ts.infradead.org>, <Conor.Dooley@...rochip.com>,
        <brgl@...ev.pl>, <linux-gpio@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <palmer@...belt.com>,
        <maz@...nel.org>, <Daire.McNamara@...rochip.com>
Subject: Re: [PATCH v6 1/1] gpio: mpfs: add polarfire soc gpio support

On Wed, 2022-08-31 at 15:19 +0200, Linus Walleij wrote:
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> 
> On Tue, Aug 30, 2022 at 6:51 AM <Lewis.Hanly@...rochip.com> wrote:
> 
> > We had looked at the bpgpio_init, our controller is not fully
> > memory
> > mapped to support the bgpio_init() and get all routines for free.
> > While we have in/out and intr (interrupt state) 32-bit registers,
> > we
> > would not get as much free as other generic memory mapped
> > controllers.
> 
> You're not really saying what the problem is?
> 
> Is it that some registers are not one-bit-indexed from 0 per GPIO?
Yes some of the registers are not one-bit-indexed per GPIO and for this
reason we had not implemented bgpio_init().
> 
> Yours,
> Linus Walleij