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Message-ID: <d314d734-eb9e-1767-6186-b12460eea604@gmail.com>
Date: Mon, 5 Sep 2022 14:56:26 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Peter Chiu <chui-hao.chiu@...iatek.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Sean Wang <sean.wang@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: Ryder Lee <ryder.Lee@...iatek.com>,
Evelyn Tsai <evelyn.tsai@...iatek.com>,
Sam Shih <sam.shih@...iatek.com>
Subject: Re: [PATCH] dt-bindings: pinctrl: update bindings for MT7986 SoC
On 02/09/2022 04:47, Peter Chiu wrote:
> Add wifi pins in the description and set groups to string-array to support
> multiple groups in a node.
>
> Reviewed-by: Sam Shih <sam.shih@...iatek.com>
> Signed-off-by: Peter Chiu <chui-hao.chiu@...iatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> .../pinctrl/mediatek,mt7986-pinctrl.yaml | 48 +++++++++++--------
> 1 file changed, 28 insertions(+), 20 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> index 4eadea55df10..b08a0a8076e0 100644
> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> @@ -117,6 +117,10 @@ patternProperties:
> "i2s" "audio" 62, 63, 64, 65
> "switch_int" "eth" 66
> "mdc_mdio" "eth" 67
> + "wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83
> + "wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
> + "wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
> + 84, 85
>
> $ref: "/schemas/pinctrl/pinmux-node.yaml"
> properties:
> @@ -234,7 +238,9 @@ patternProperties:
> then:
> properties:
> groups:
> - enum: [wf_2g, wf_5g, wf_dbdc]
> + $ref: /schemas/types.yaml#/definitions/string-array
> + items:
> + enum: [wf_2g, wf_5g, wf_dbdc]
> '.*conf.*':
> type: object
> additionalProperties: false
> @@ -248,25 +254,27 @@ patternProperties:
> An array of strings. Each string contains the name of a pin.
> There is no PIN 41 to PIN 65 above on mt7686b, you can only use
> those pins on mt7986a.
> - enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
> - GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
> - GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
> - GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
> - SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
> - SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
> - UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
> - UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
> - UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
> - EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
> - EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
> - PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
> - WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
> - WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
> - WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
> - WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
> - WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
> - WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
> - WF1_HB8]
> + $ref: /schemas/types.yaml#/definitions/string-array
> + items:
> + enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
> + GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
> + GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
> + GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
> + SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
> + SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
> + UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
> + UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
> + UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
> + EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
> + EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
> + PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
> + WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
> + WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
> + WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
> + WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
> + WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
> + WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
> + WF1_HB8]
>
> bias-disable: true
>
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