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Message-ID: <YxX5JaRfyvKLrHw5@lunn.ch>
Date:   Mon, 5 Sep 2022 15:27:01 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Arun Ramadoss <arun.ramadoss@...rochip.com>
Cc:     linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        UNGLinuxDriver@...rochip.com, hkallweit1@...il.com,
        linux@...linux.org.uk, davem@...emloft.net, edumazet@...gle.com,
        kuba@...nel.org, pabeni@...hat.com
Subject: Re: [Patch net] net: phy: lan87xx: change interrupt src of link_up
 to comm_ready

On Mon, Sep 05, 2022 at 12:50:17PM +0530, Arun Ramadoss wrote:
> Currently phy link up/down interrupt is enabled using the
> LAN87xx_INTERRUPT_MASK register. In the lan87xx_read_status function,
> phy link is determined using the T1_MODE_STAT_REG register comm_ready bit.
> comm_ready bit is set using the loc_rcvr_status & rem_rcvr_status.
> Whenever the phy link is up, LAN87xx_INTERRUPT_SOURCE link_up bit is set
> first but comm_ready bit takes some time to set based on local and
> remote receiver status.
> As per the current implementation, interrupt is triggered using link_up
> but the comm_ready bit is still cleared in the read_status function. So,
> link is always down.  Initially tested with the shared interrupt
> mechanism with switch and internal phy which is working, but after
> implementing interrupt controller it is not working.
> It can fixed either by updating the read_status function to read from
> LAN87XX_INTERRUPT_SOURCE register or enable the interrupt mask for
> comm_ready bit. But the validation team recommends the use of comm_ready
> for link detection.
> This patch fixes by enabling the comm_ready bit for link_up in the
> LAN87XX_INTERRUPT_MASK_2 register (MISC Bank) and link_down in
> LAN87xx_INTERRUPT_MASK register.
> 
> Fixes: 8a1b415d70b7 ("net: phy: added ethtool master-slave configuration
> 		     support")

Please don't wrap such lines, even when they are longer than 80
characters. They are used by tooling during back porting.

> Signed-off-by: Arun Ramadoss <arun.ramadoss@...rochip.com>


Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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