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Message-ID: <20220906133539.6ghjlzbs2ozgsa7v@core>
Date: Tue, 6 Sep 2022 15:35:39 +0200
From: Ondřej Jirman <megi@....cz>
To: Tom Fitzhenry <tom@...-fitzhenry.me.uk>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
phone-devel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: add BT/wifi nodes to Pinephone Pro
Hello Tom,
On Tue, Sep 06, 2022 at 10:47:13PM +1000, Tom Fitzhenry wrote:
> Pinephone Pro includes a AzureWave AW-CM256SM wifi (sdio0) and
> bt (uart0) combo module, which is based on Cypress
> CYP43455 (BCM43455).
>
> Signed-off-by: Tom Fitzhenry <tom@...-fitzhenry.me.uk>
> ---
> .../dts/rockchip/rk3399-pinephone-pro.dts | 69 +++++++++++++++++++
> 1 file changed, 69 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
> index 2e058c3150256..096238126e4c1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
> @@ -43,6 +43,20 @@ key-power {
> };
> };
>
> + /* Power sequence for SDIO WiFi module */
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&rk818 1>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h_pin>;
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <500000>;
Do we really need such long delays? Almost no boards in rockchip/ use such
delays at all, and if they do they don't usually use power off delay.
> + /* WL_REG_ON on module */
> + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
> + };
> +
> vcc_sys: vcc-sys-regulator {
> compatible = "regulator-fixed";
> regulator-name = "vcc_sys";
> @@ -360,11 +374,31 @@ vsel2_pin: vsel2-pin {
> };
> };
>
> + sdio-pwrseq {
> + wifi_enable_h_pin: wifi-enable-h-pin {
> + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> sound {
> vcc1v8_codec_en: vcc1v8-codec-en {
> rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
> };
> };
> +
> + wireless-bluetooth {
> + bt_wake_pin: bt-wake-pin {
> + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_host_wake_pin: bt-host-wake-pin {
> + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_reset_pin: bt-reset-pin {
> + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> };
>
> &sdmmc {
see below
> @@ -380,6 +414,20 @@ &sdmmc {
> status = "okay";
> };
>
> +&sdio0 {
sd'i'o0 comes before 'm' in the alphabet.
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + disable-wp;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
> + sd-uhs-sdr104;
> + status = "okay";
It might also be good to add the wifi node, and hookup the interrupt line and
pinctrls, so that WoW works, while you're at it.
See eg. https://elixir.bootlin.com/linux/v5.19.7/source/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts#L30
Looks like WIFI_HOST_WAKE_L is hooked to GPIO4_D0/PCIE_CLKREQnB_u according
to the schematic. Let's hope GPIO4_D will consider 1.8V as high, because SoC
GPIO4_D is in 3.0V domain and VDDIO of wifi chip is 1.8V.
Other than that,
Reviewed-by: Ondřej Jirman <megi@....cz>
Thank you and kind regards,
o.
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