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Message-ID: <Yxe09Bk7tNwa6OsO@hirez.programming.kicks-ass.net>
Date: Tue, 6 Sep 2022 23:00:36 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Hans de Goede <hdegoede@...hat.com>
Cc: "Rafael J . Wysocki" <rafael@...nel.org>,
Pavel Machek <pavel@....cz>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H . Peter Anvin" <hpa@...or.com>, x86@...nel.org,
linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>
Subject: Re: [PATCH] x86/cpu: Avoid writing MSR_IA32_TSX_CTRL when writing it
is not supported
On Tue, Sep 06, 2022 at 10:56:47PM +0200, Hans de Goede wrote:
> Hi,
>
> On 9/6/22 22:43, Peter Zijlstra wrote:
> > On Tue, Sep 06, 2022 at 10:17:43PM +0200, Hans de Goede wrote:
> >> On an Intel Atom N2600 (and presumable other Cedar Trail models)
> >> MSR_IA32_TSX_CTRL can be read, causing saved_msr.valid to be set for it
> >> by msr_build_context().
> >>
> >> This causes restore_processor_state() to try and restore it, but writing
> >> this MSR is not allowed on the Intel Atom N2600 leading to:
> >
> > FWIW, virt tends to do this same thing a lot. They'll allow reading
> > random MSRs and only fail on write.
>
> Right. So I guess I should send a v2 with an updated commit
> message mentioning this ?
Nah, just saying this is a somewhat common pattern with MSRs.
The best ones are the one where writing the value read is invalid :/ or
those who also silently eat a 0 write just for giggles. Luckily that
doesn't happen often.
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