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Message-Id: <20220906121921.8355-1-tjytimi@163.com>
Date:   Tue,  6 Sep 2022 20:19:21 +0800
From:   Jinyu Tang <tjytimi@....com>
To:     paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, conor.dooley@...rochip.com,
        anup@...infault.org, alexandre.ghiti@...onical.com,
        guoren@...nel.org, akpm@...ux-foundation.org, heiko@...ech.de,
        tongtiangen@...wei.com, sunnanyong@...wei.com
Cc:     linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        falcon@...ylab.org, tjytimi@....com
Subject: [PATCH v1] riscv : support update_mmu_tlb() for riscv

Add macro definition to support updata_mmu_tlb() for riscv,
this function is from commit:7df676974359 ("mm/memory.c:Update 
local TLB if PTE entry exists").

Signed-off-by: Jinyu Tang <tjytimi@....com>
---
 arch/riscv/include/asm/pgtable.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 7ec936910a96..84a791d54f95 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
 	local_flush_tlb_page(address);
 }
 
+#define	__HAVE_ARCH_UPDATE_MMU_TLB
+#define update_mmu_tlb	update_mmu_cache
+
 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
 		unsigned long address, pmd_t *pmdp)
 {
-- 
2.30.2

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