[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <12049260.O9o76ZdvQC@g550jk>
Date: Wed, 07 Sep 2022 17:30:30 +0200
From: Luca Weiss <luca@...tu.xyz>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
Vladimir Lypak <vladimir.lypak@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/3] arm64: dts: qcom: msm8953: add MDSS
Hi Dmitry,
On Dienstag, 6. September 2022 21:41:11 CEST Dmitry Baryshkov wrote:
> On Tue, 6 Sept 2022 at 21:36, Luca Weiss <luca@...tu.xyz> wrote:
> > From: Vladimir Lypak <vladimir.lypak@...il.com>
> >
> > Add the MDSS, MDP and DSI nodes that are found on msm8953 SoC.
> >
> > Signed-off-by: Vladimir Lypak <vladimir.lypak@...il.com>
> > Signed-off-by: Luca Weiss <luca@...tu.xyz>
> > ---
> > Changes since v2:
> > - add "core" clock for mdss as suggested by Dmitry Baryshkov
> >
> > arch/arm64/boot/dts/qcom/msm8953.dtsi | 210 ++++++++++++++++++++++++++
> > 1 file changed, 210 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 3d11331e78d2..580333141a66
> > 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> > @@ -726,6 +726,216 @@ tcsr_phy_clk_scheme_sel: syscon@...f044 {
> >
> > reg = <0x193f044 0x4>;
> >
> > };
> >
> > + mdss: mdss@...0000 {
> > + compatible = "qcom,mdss";
> > +
> > + reg = <0x1a00000 0x1000>,
> > + <0x1ab0000 0x1040>;
> > + reg-names = "mdss_phys",
> > + "vbif_phys";
> > +
> > + power-domains = <&gcc MDSS_GDSC>;
> > + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > +
> > + clocks = <&gcc GCC_MDSS_AHB_CLK>,
> > + <&gcc GCC_MDSS_AXI_CLK>,
> > + <&gcc GCC_MDSS_VSYNC_CLK>,
> > + <&gcc GCC_MDSS_MDP_CLK>;
> > + clock-names = "iface",
> > + "bus",
> > + "vsync",
> > + "core";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + status = "disabled";
> > +
> > + mdp: mdp@...1000 {
> > + compatible = "qcom,mdp5";
>
> Could you please change this to "qcom,msm8953-mdp5", "qcom,mdp5".
This would be the first dtsi using the two compatibles then, correct? Are there
any plans to adjust other SoCs?
>
> > + reg = <0x1a01000 0x89000>;
> > + reg-names = "mdp_phys";
> > +
>
> [skipped]
>
> > +
> > + dsi0_phy: dsi-phy@...4400 {
>
> Let's probably use a generic name 'phy' here and for dsi1_phy.
Here also, the bindings examples all use dsi-phy@, are there any plans to
change that and adjust other dtsi files?
>
> The rest looks good to me.
Thanks!
Regards
Luca
>
> > + compatible = "qcom,dsi-phy-14nm-8953";
> > + reg = <0x1a94400 0x100>,
> > + <0x1a94500 0x300>,
> > + <0x1a94800 0x188>;
> > + reg-names = "dsi_phy",
> > + "dsi_phy_lane",
> > + "dsi_pll";
> > +
> > + #clock-cells = <1>;
> > + #phy-cells = <0>;
> > +
> > + clocks = <&gcc GCC_MDSS_AHB_CLK>,
> > <&xo_board>; + clock-names = "iface",
> > "ref";
> > +
> > + status = "disabled";
> > + };
Powered by blists - more mailing lists