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Message-ID: <CAJF2gTR0p1C=JN1gr_O7ThZririQ9wstMxcixKL4yqRQKdvrCg@mail.gmail.com>
Date: Wed, 7 Sep 2022 23:59:05 +0800
From: Guo Ren <guoren@...nel.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, samuel@...lland.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel test robot <lkp@...el.com>
Subject: Re: [PATCH] riscv: make t-head erratas depend on MMU
Reviewed-by: Guo Ren <guoren@...nel.org>
On Wed, Sep 7, 2022 at 11:49 PM Heiko Stuebner <heiko@...ech.de> wrote:
>
> Both basic extensions of SVPBMT and ZICBOM depend on CONFIG_MMU.
> Make the T-Head errata implementations of the similar functionality
> also depend on it to prevent build errors.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Fixes: d20ec7529236 ("riscv: implement cache-management errata for T-Head SoCs")
> Reported-by: kernel test robot <lkp@...el.com>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> ---
> arch/riscv/Kconfig.erratas | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas
> index 6850e9389930..f3623df23b5f 100644
> --- a/arch/riscv/Kconfig.erratas
> +++ b/arch/riscv/Kconfig.erratas
> @@ -46,7 +46,7 @@ config ERRATA_THEAD
>
> config ERRATA_THEAD_PBMT
> bool "Apply T-Head memory type errata"
> - depends on ERRATA_THEAD && 64BIT
> + depends on ERRATA_THEAD && 64BIT && MMU
> select RISCV_ALTERNATIVE_EARLY
> default y
> help
> @@ -57,7 +57,7 @@ config ERRATA_THEAD_PBMT
>
> config ERRATA_THEAD_CMO
> bool "Apply T-Head cache management errata"
> - depends on ERRATA_THEAD
> + depends on ERRATA_THEAD && MMU
> select RISCV_DMA_NONCOHERENT
> default y
> help
> --
> 2.35.1
>
--
Best Regards
Guo Ren
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