linux-kernel - Re: [PATCH v2 2/3] KVM: x86/pmu: Limit the maximum number of supported Intel GP counters

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Message-ID: <CALMp9eQ_zk=H=q9A8qu_7TUEBjnKXPWtXygmdDpyQCrRDkLF9w@mail.gmail.com>
Date:   Wed, 7 Sep 2022 09:29:29 -0700
From:   Jim Mattson <jmattson@...gle.com>
To:     Like Xu <like.xu.linux@...il.com>
Cc:     Sean Christopherson <seanjc@...gle.com>,
        Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/3] KVM: x86/pmu: Limit the maximum number of
 supported Intel GP counters

On Wed, Sep 7, 2022 at 3:49 AM Like Xu <like.xu.linux@...il.com> wrote:
>
> From: Like Xu <likexu@...cent.com>
>
> The Intel Architectural IA32_PMCx MSRs addresses range allows for
> a maximum of 8 GP counters. A local macro (named KVM_INTEL_PMC_MAX_GENERIC)
> is introduced to take back control of this virtual capability to avoid
> errors introduced by the out-of-bound counter emulations.
>
> Suggested-by: Jim Mattson <jmattson@...gle.com>
> Signed-off-by: Like Xu <likexu@...cent.com>

Reviewed-by: Jim Mattson <jmattson@...gle.com>