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Message-ID: <e7f08898-b967-f1fb-6067-5243622dd7be@quicinc.com>
Date: Wed, 7 Sep 2022 10:42:05 -0700
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Kuogee Hsieh <quic_khsieh@...cinc.com>, <robdclark@...il.com>,
<sean@...rly.run>, <swboyd@...omium.org>, <dianders@...omium.org>,
<vkoul@...nel.org>, <daniel@...ll.ch>, <airlied@...ux.ie>,
<agross@...nel.org>, <dmitry.baryshkov@...aro.org>,
<bjorn.andersson@...aro.org>
CC: <quic_sbillaka@...cinc.com>, <freedreno@...ts.freedesktop.org>,
<dri-devel@...ts.freedesktop.org>, <linux-arm-msm@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dp: cleared DP_DOWNSPREAD_CTRL register before
start link training
On 9/7/2022 10:21 AM, Kuogee Hsieh wrote:
> DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
> upstream device disconnect. This patch will enforce this rule by always
> cleared DOWNPREAD_CTRL register to 0 before start link training. At rare
> case that DP MSA timing parameters may be mis-interpreted by the sinker
sinker--->sink
> which causes audio sampling rate be calculated wrongly and cause audio
> did not work at sinker if DOWNSPREAD_CTRL register is not cleared to 0.
same here
> This patch also make sure bring sinker out of D3 power-down mode into D0
> (normal operation mode) successfully by retrying 3 times.
>
here too
> Fixes: 154b5a7da0fd ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <quic_khsieh@...cinc.com>
> ---
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 ++---
> drivers/gpu/drm/msm/dp/dp_link.c | 17 +++++++++++------
> 2 files changed, 13 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index ab6aa13..e864a6e 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1245,7 +1245,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
> {
> int ret = 0;
> const u8 *dpcd = ctrl->panel->dpcd;
> - u8 encoding = DP_SET_ANSI_8B10B;
> + u8 encoding[2] = {0, DP_SET_ANSI_8B10B};
> u8 ssc;
> u8 assr;
> struct dp_link_info link_info = {0};
> @@ -1263,8 +1263,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
> drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1);
> }
>
> - drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
> - &encoding, 1);
> + drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, encoding, 2);
>
This seems wrong.
This will override the value programmed by the above piece of code.
if (drm_dp_max_downspread(dpcd)) {
ssc = DP_SPREAD_AMP_0_5;
drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1);
}
Perhaps, you should have an else case to the above if and program 0 only
for those cases?
> if (drm_dp_alternate_scrambler_reset_cap(dpcd)) {
> assr = DP_ALTERNATE_SCRAMBLER_RESET_ENABLE;
> diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
> index 36f0af0..3ad3826 100644
> --- a/drivers/gpu/drm/msm/dp/dp_link.c
> +++ b/drivers/gpu/drm/msm/dp/dp_link.c
> @@ -49,7 +49,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
> struct dp_link_info *link)
> {
> u8 value;
> - int err;
> + int i, err;
>
> if (link->revision < 0x11)
> return 0;
> @@ -61,11 +61,16 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
> value &= ~DP_SET_POWER_MASK;
> value |= DP_SET_POWER_D0;
>
> - err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
> - if (err < 0)
> - return err;
> -
> - usleep_range(1000, 2000);
> + /*
> + * When turning on, we need to retry for 1ms to give the sink
> + * time to wake up.
> + */
> + for (i = 0; i < 3; i++) {
> + err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
> + usleep_range(1000, 2000);
> + if (err == 1)
> + break;
> + }
>
> return 0;
> }
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