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Message-ID: <20220907175300.GA3779566-robh@kernel.org>
Date: Wed, 7 Sep 2022 12:53:00 -0500
From: Rob Herring <robh@...nel.org>
To: Richard Acayan <mailingradian@...il.com>
Cc: bjorn.andersson@...aro.org, agross@...nel.org,
konrad.dybcio@...ainline.org, mturquette@...libre.com,
sboyd@...nel.org, krzysztof.kozlowski+dt@...aro.org,
tdas@...eaurora.org, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht, caleb@...nolly.tech,
jo@...amily.in
Subject: Re: [PATCH 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global
clocks
On Tue, Sep 06, 2022 at 10:50:33PM -0400, Richard Acayan wrote:
> The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
> of the new clocks, GDSCs, and resets already have reserved IDs but there
> are some resources that don't. Add the new clock and extra BCR from
> Snapdragon 670 and document the differences between the SoC parent clocks.
>
> Signed-off-by: Richard Acayan <mailingradian@...il.com>
> ---
> .../bindings/clock/qcom,gcc-sdm845.yaml | 24 +++++++++++++++----
> include/dt-bindings/clock/qcom,gcc-sdm845.h | 2 ++
> 2 files changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/defaced/bindings/clock/qcom,gcc-sdm845.yaml
> index daf7906ebc40..ba94dd32e619 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
> @@ -19,23 +19,21 @@ description: |
>
> properties:
> compatible:
> - const: qcom,gcc-sdm845
> + enum:
> + - qcom,gcc-sdm670
> + - qcom,gcc-sdm845
>
> clocks:
> items:
> - description: Board XO source
> - description: Board active XO source
> - description: Sleep clock source
> - - description: PCIE 0 Pipe clock source
> - - description: PCIE 1 Pipe clock source
You just changed the clocks from 5 to 3. Please test your changes:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clock-names:0: 'pcie_0_pipe_clk' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clock-names:1: 'pcie_1_pipe_clk' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@...000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
What you want here I think is 'minItems: 3' and then restrict the clocks
to 3 or 5 in the if/then schema.
Rob
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