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Message-ID: <20220907203938.GA301364-robh@kernel.org>
Date: Wed, 7 Sep 2022 15:39:38 -0500
From: Rob Herring <robh@...nel.org>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: Lewis Hanly <lewis.hanly@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Vattipalli Praveen <praveen.kumar@...rochip.com>,
Rob Herring <robh+dt@...nel.org>,
Hugh Breslin <hugh.breslin@...rochip.com>,
Shravan Chippa <shravan.chippa@...rochip.com>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Wolfgang Grandegger <wg@...es-embedded.de>,
devicetree@...r.kernel.org, Cyril Jean <Cyril.Jean@...rochip.com>
Subject: Re: [PATCH v3 2/9] dt-bindings: riscv: microchip: document the aries
m100pfsevp
On Thu, 01 Sep 2022 14:33:57 +0100, Conor Dooley wrote:
> Add a compatible for the Aries Embedded M100PFSEVP SOM + EVK platform.
>
> Link: https://www.aries-embedded.com/polarfire-soc-fpga-microsemi-m100pfs-som-mpfs025t-pcie-serdes
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> Documentation/devicetree/bindings/riscv/microchip.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@...nel.org>
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