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Message-ID: <alpine.DEB.2.22.394.2209071359050.3336870@rhweight-WRK1>
Date: Wed, 7 Sep 2022 14:01:39 -0700 (PDT)
From: matthew.gerlach@...ux.intel.com
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
cc: hao.wu@...el.com, yilun.xu@...el.com, russell.h.weight@...el.com,
basheer.ahmed.muddebihal@...el.com, trix@...hat.com,
mdf@...nel.org, linux-fpga@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
tianfei.zhang@...el.com, corbet@....net,
gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
jirislaby@...nel.org, geert+renesas@...der.be,
niklas.soderlund+renesas@...natech.se, phil.edworthy@...esas.com,
macro@...am.me.uk, johan@...nel.org, lukas@...ner.de,
Basheer Ahmed Muddebihal
<basheer.ahmed.muddebihal@...ux.intel.com>
Subject: Re: [PATCH v1 2/5] fpga: dfl: Move the DFH definitions
On Tue, 6 Sep 2022, Andy Shevchenko wrote:
> On Tue, Sep 06, 2022 at 12:04:23PM -0700, matthew.gerlach@...ux.intel.com wrote:
>> From: Basheer Ahmed Muddebihal <basheer.ahmed.muddebihal@...ux.intel.com>
>>
>> Moving the DFH register offset and register definitions from
>> drivers/fpga/dfl.h to include/linux/dfl.h. These definitions
>
> Single space?
Sorry for the old habit. I will make it one space.
>
>> need to be accessed by dfl drivers that are outside of
>> drivers/fpga.
>
> ...
>
>> +#define DFH 0x0
>> +#define GUID_L 0x8
>> +#define GUID_H 0x10
>> +#define NEXT_AFU 0x18
>
> While at it, you may make them same width, like "0x08".
The same width does look better. Thanks for the suggestion.
Matthew Gerlach
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
>
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