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Message-ID: <5d3e3a73-8b13-fb23-a32c-565046ec3c27@linux.intel.com>
Date: Wed, 7 Sep 2022 12:21:06 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: Sergiu Moga <sergiu.moga@...rochip.com>
cc: lee@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, nicolas.ferre@...rochip.com,
alexandre.belloni@...tlin.com, claudiu.beznea@...rochip.com,
richard.genoud@...il.com, radu_nicolae.pirea@....ro,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
broonie@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
Jiri Slaby <jirislaby@...nel.org>, admin@...iphile.com,
kavyasree.kotagiri@...rochip.com, tudor.ambarus@...rochip.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
LKML <linux-kernel@...r.kernel.org>, linux-spi@...r.kernel.org,
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Subject: Re: [PATCH v2 08/13] tty: serial: atmel: Define GCLK as USART baudrate
source clock
On Tue, 6 Sep 2022, Sergiu Moga wrote:
> Define the bit that represents the choice of having GCLK as a baudrate
> source clock inside the USCLKS bitmask of the Mode Register of
> USART IP's.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@...rochip.com>
> ---
>
>
> v1 -> v2:
> - Nothing, this patch was not here before
>
>
>
> drivers/tty/serial/atmel_serial.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
> index 0d8a0f9cc5c3..70d0611e56fd 100644
> --- a/drivers/tty/serial/atmel_serial.h
> +++ b/drivers/tty/serial/atmel_serial.h
> @@ -49,6 +49,7 @@
> #define ATMEL_US_USCLKS GENMASK(5, 4) /* Clock Selection */
> #define ATMEL_US_USCLKS_MCK (0 << 4)
> #define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
> +#define ATMEL_US_USCLKS_GCLK (2 << 4)
This would be FIELD_PREP(ATMEL_US_USCLKS, 2) from linux/bitfield.h.
They should all be converted to use FIELD_PREP(), IMHO (in a separate
patch).
> #define ATMEL_US_USCLKS_SCK (3 << 4)
> #define ATMEL_US_CHRL GENMASK(7, 6) /* Character Length */
> #define ATMEL_US_CHRL_5 (0 << 6)
>
--
i.
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