[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <cc00fad3-08fb-462a-12ac-73143aa4206f@linaro.org>
Date: Wed, 7 Sep 2022 14:22:28 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Krishna chaitanya chundru <quic_krichai@...cinc.com>,
helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org, dmitry.baryshkov@...aro.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing aggre0,
aggre1 clocks
On 03/09/2022 04:13, Krishna chaitanya chundru wrote:
> Add missing aggre0, aggre1 clocks.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index e66fc67..a5ce095 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2043,6 +2043,8 @@
> <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
> <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
> <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
> + <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
> + <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
> <&gcc GCC_DDRSS_PCIE_SF_CLK>;
>
> clock-names = "pipe",
> @@ -2055,6 +2057,8 @@
> "bus_slave",
> "slave_q2a",
> "tbu",
> + "aggre0",
> + "aggre1",
> "ddrss_sf_tbu";
>
Same as binding - adding entries in the middle causes ABI issues.
Best regards,
Krzysztof
Powered by blists - more mailing lists