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Message-Id: <20220908230243.207783-1-mailingradian@gmail.com>
Date:   Thu,  8 Sep 2022 19:02:43 -0400
From:   Richard Acayan <mailingradian@...il.com>
To:     krzysztof.kozlowski@...aro.org
Cc:     linux-arm-msm@...r.kernel.org, andersson@...nel.org,
        agross@...nel.org, konrad.dybcio@...ainline.org,
        mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, tdas@...eaurora.org,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht, caleb@...nolly.tech,
        jo@...amily.in, Richard Acayan <mailingradian@...il.com>
Subject: Re: [PATCH v2 3/3] clk: qcom: gcc-sdm845: add sdm670 global clock data

> > @@ -3515,6 +3881,7 @@ static const struct qcom_reset_map gcc_sdm845_resets[] = {
> >  	[GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
> >  	[GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
> >  	[GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
> > +	[GCC_SDCC1_BCR] = { 0x26000 },
> 
> You are changing existing SDM845, so this should be separate patch with
> its own explanation.

I only added this reset for the sake of completeness. It is not used in my
initial dtsi so I will drop it from this series. It can be added later if
it is needed for a specific device.

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